Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Renu Rajput"'
Autor:
Rakesh Vaid, Renu Rajput
Publikováno v:
Journal of Materials Science: Materials in Electronics. 31:15267-15276
In this study, the charge storage characteristics of Pt–Ti/HfO2/TiN/SiON/n-Si capacitor are demonstrated for flash memory applications. It presents favorable performance with gate coupling ratio (GCR) of 0.68 and 0.71 for as-deposited and annealed
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::91347b9cd7c17a8543254cb416b5e861
https://doi.org/10.1007/s10854-020-04091-2
https://doi.org/10.1007/s10854-020-04091-2
Autor:
Rakesh Vaid, Renu Rajput
Publikováno v:
Facta universitatis - series: Electronics and Energetics. 33:155-167
Traditional flash memory devices consist of Polysilicon Control Gate (CG) - Oxide-Nitride-Oxide (ONO - Interpoly Dielectric) - Polysilicon Floating Gate (FG) - Silicon Oxide (Tunnel dielectric) - Substrate. The dielectrics have to be scaled down cons
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6b7c62479db2aad3ea4100e90b61378d
https://doi.org/10.2298/fuee2002155r
https://doi.org/10.2298/fuee2002155r
Publikováno v:
Microsystem Technologies. 24:4179-4185
We present the fabrication and characterization of n-Si/SiON/metal (metal–oxide–semiconductor (MOS)) gate structure with silicon oxynitride (SiON) as insulating layer and different metal films such as Aluminium (Al), Titanium nitride (TiN) and Pl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::799b535acc9ce74efaf9abdf67ccb479
https://doi.org/10.1007/s00542-017-3703-3
https://doi.org/10.1007/s00542-017-3703-3
Publikováno v:
Solid State Sciences. 59:7-14
We report the fabrication of an ultra-thin silicon oxynitride (SiON) as an interfacial layer (IL) for n-Si/ALD-HfO 2 gate stack with reduced leakage current. The XRD, AFM, FTIR, FESEM and EDAX characterizations have been performed for structural and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8aa4dcdc25c01f56c6d410027f0ca257
https://doi.org/10.1016/j.solidstatesciences.2016.07.001
https://doi.org/10.1016/j.solidstatesciences.2016.07.001
Autor:
Renu Rajput, Rakesh Vaid
Publikováno v:
2017 14th IEEE India Council International Conference (INDICON).
We report the effect of thermal and formal gas annealing on the electro-physical characteristics of Si/SiON/Ti-Pt MOScap by analyzing high-frequency capacitance-voltage (C-V) and current-voltage (I-V) characteristics. Thermal and forming gas annealin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f236dfa7b841f6ff48e8273d0d3c1bd5
https://doi.org/10.1109/indicon.2017.8487991
https://doi.org/10.1109/indicon.2017.8487991
Publikováno v:
ECS Meeting Abstracts. :295-295
The ability to block the direct current is one of the main requisite for the gate dielectric in a metal-oxide-field-effect-transistor. Since thickness of oxide is inversely related with oxide capacitance, therefore oxide capacitance can be increased
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a4a2d2069af41134aff36f2442a5499b
https://doi.org/10.1149/ma2018-03/5/295
https://doi.org/10.1149/ma2018-03/5/295
Publikováno v:
ECS Meeting Abstracts. :279-279
To address the cell-to-cell interference in conventional floating gate (FG) flash memory, a fully planar structure demands continuous scaling of poly silicon floating gate thickness. But the reduced FG thickness causes reliability issues due to bal
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9df6d405db12699d697cee2581d68d7d
https://doi.org/10.1149/ma2018-03/5/279
https://doi.org/10.1149/ma2018-03/5/279