Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Renato S. Feitoza"'
Publikováno v:
IEEE Transactions on Device and Materials Reliability. 19:37-45
Reduced-code techniques for an analog-to-digital converter (ADC) static linearity test have the potential to drastically reduce the number of necessary measurements for a complete static linearity characterization. These techniques take advantage of
Autor:
Michele Portolan, Ghislain Takam Tchendjou, Vincent Reynaud, Salvador Mir, Paolo Maistri, Emmanuel Simeu, Manuel J. Barragan, Regis Leveugle, Kalpana Senthamarai Kannan, Lorena Anghel, Renato S. Feitoza
Publikováno v:
2020 IEEE 26th International Symposium on
Testing and Robust System Design (IOLTS)
2020 International Symposium on
Testing and Robust System Design (IOLTS 2020)
Testing and Robust System Design (IOLTS 2020), Jul 2020, Naples (Virtual Conference), Italy. ⟨10.1109/IOLTS50870.2020.9159721⟩
IOLTS
Testing and Robust System Design (IOLTS)
2020 International Symposium on
Testing and Robust System Design (IOLTS 2020)
Testing and Robust System Design (IOLTS 2020), Jul 2020, Naples (Virtual Conference), Italy. ⟨10.1109/IOLTS50870.2020.9159721⟩
IOLTS
International audience; The disruptive potential of the IEEE 1687 standard does not come from a single innovation, but rather from its capacity of providing a unified framework where heterogeneous approaches can co-exist and interact. In this Special
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::97342840e56e08021b9edfc5631de8e2
https://hal.science/hal-02939302/document
https://hal.science/hal-02939302/document
Publikováno v:
18th IEEE International New Circuits and Systems Conference
18th IEEE International NEWCAS Conference (NEWCAS 2020)
18th IEEE International NEWCAS Conference (NEWCAS 2020), Jun 2020, Montreal, Canada. ⟨10.1109/NEWCAS49341.2020.9159839⟩
NEWCAS
18th IEEE International NEWCAS Conference (NEWCAS 2020)
18th IEEE International NEWCAS Conference (NEWCAS 2020), Jun 2020, Montreal, Canada. ⟨10.1109/NEWCAS49341.2020.9159839⟩
NEWCAS
International audience; This work presents a reduced-code strategy for the static linearity self-testing of Vcm-based successive-approximation analog to digital converters (SAR ADCs). These techniques take advantage of the repetitive operation of SAR
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::fb9a0de6f941171ca09f0798863f4dc0
https://hal.archives-ouvertes.fr/hal-02958196
https://hal.archives-ouvertes.fr/hal-02958196
Publikováno v:
2020 IEEE European Test Symposium (ETS)
IEEE European Test Symposium (ETS 2020)
IEEE European Test Symposium (ETS 2020), May 2020, Tallinn, Estonia. ⟨10.1109/ETS48528.2020.9131588⟩
ETS
IEEE European Test Symposium (ETS 2020)
IEEE European Test Symposium (ETS 2020), May 2020, Tallinn, Estonia. ⟨10.1109/ETS48528.2020.9131588⟩
ETS
International audience; This paper describes a BIST technique for the static linearity test of $V_{cm}$ -based successive-approximation analog-to-digital converters (SAR ADCs). We discuss the application of reduced-code techniques for the $V_{cm}$ -b
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ea153de27c565eae31dc3653da81f04f
https://hal.science/hal-02899891
https://hal.science/hal-02899891
Autor:
Jorge V. de Almeida, Renato S. Feitoza
Publikováno v:
IEEE Microwave Magazine. 19:95-100
In recent years, significant attention has been directed toward the design and optimization of inductive-coupled resonant systems for wireless power transmission (WPT). Due to emerging applications, ranging from electric vehicle charging to wirelessl
Publikováno v:
VLSI-SoC
27th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
27th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2019, Cuzco, Peru. pp.263-268
2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC)
27th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2019, Cuzco, Peru. pp.263-268, ⟨10.1109/VLSI-SoC.2019.8920377⟩
27th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
27th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2019, Cuzco, Peru. pp.263-268
2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC)
27th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), Oct 2019, Cuzco, Peru. pp.263-268, ⟨10.1109/VLSI-SoC.2019.8920377⟩
International audience; This work presents reduced-code strategies for the static linearity test of successive-approximation analog-to-digital converters. Reduced-code techniques for ADC static linearity test may drastically reduce the test time for
Publikováno v:
IOLTS
This work presents a strategy for static linearity self-testing of successive-approximation analog to digital converters (SAR ADCs) with the goal of reducing test time. The proposed test technique takes advantage of the SAR ADC architecture to drasti