Zobrazeno 1 - 10
of 22
pro vyhledávání: '"Rashid, Syed Aftab"'
Publikováno v:
In Journal of Systems Architecture October 2022 131
Publikováno v:
In Journal of Systems Architecture January 2022 122
Publikováno v:
In Journal of Systems Architecture January 2022 122
Autor:
Rashid, Syed Aftab, Haider, Zeeshan, Chapal Hossain, S.M., Memon, Kashan, Panhwar, Fazil, Mbogba, Momoh Karmah, Hu, Peng, Zhao, Gang
Publikováno v:
In Applied Energy 15 February 2019 236:648-661
The 3-phase task execution model has shown to be a good candidate to tackle the memory bus contention problem. It divides the execution of tasks into computation and memory phases that enable a fine-grained memory bus contention analysis. However, ex
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od______2595::9ca0ccbab2ee66c27c1e5fd97c7ce67b
https://hdl.handle.net/10400.22/23192
https://hdl.handle.net/10400.22/23192
Publikováno v:
2022 IEEE Real-Time Systems Symposium (RTSS).
Multicore platforms share the hardware resources such as caches, interconnects, and main memory among all the cores. Due to such sharing, tasks running on different cores compete to access these shared resources which increases the execution times of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::f81b68a5e86910169db9405ac01b99c5
https://doi.org/10.1109/rtss55097.2022.00054
https://doi.org/10.1109/rtss55097.2022.00054
The sharing of main memory among concurrently executing tasks on a multicore platform results in increasing the execution times of those tasks in a non-deterministic manner. The use of phased execution models that divide the execution of tasks into d
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::415b1f2fd8e36209b23d61fd157f7eb1
https://hdl.handle.net/10400.22/20907
https://hdl.handle.net/10400.22/20907
The Predictable Execution Model (PREM) is useful for mitigating inter-core interference due to shared resources such as the main memory. However, it is cache-agnostic, which makes schedulabulity analysis pessimistic, via overestimation of prefetches
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::556b837f025d13d9ab8ebf8f66c6a3d4
https://hdl.handle.net/10400.22/20900
https://hdl.handle.net/10400.22/20900
Today multicore processors are used in most modern systems that require computational logic. However, their applicability in systems with stringent timing requirements is still an ongoing research. This is due to the difficulty of ensuring the timing
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od______2595::6ba871d1d1869be34c67d74c4b4761b9
https://hdl.handle.net/10400.22/20906
https://hdl.handle.net/10400.22/20906
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