Zobrazeno 1 - 10
of 155
pro vyhledávání: '"Rasch, Malte"'
Given the high economic and environmental costs of using large vision or language models, analog in-memory accelerators present a promising solution for energy-efficient AI. While inference on analog accelerators has been studied recently, the traini
Externí odkaz:
http://arxiv.org/abs/2406.12774
Autor:
Kalantzis, Vassilis, Squillante, Mark S., Ubaru, Shashanka, Gokmen, Tayfun, Wu, Chai Wah, Gupta, Anshul, Avron, Haim, Nowicki, Tomasz, Rasch, Malte, Onen, Murat, Marrero, Vanessa Lopez, Leobandung, Effendi, Kohda, Yasuteru, Haensch, Wilfried, Horesh, Lior
Numerical computation is essential to many areas of artificial intelligence (AI), whose computing demands continue to grow dramatically, yet their continued scaling is jeopardized by the slowdown in Moore's law. Multi-function multi-way analog (MFMWA
Externí odkaz:
http://arxiv.org/abs/2401.13754
Autor:
Lammie, Corey, Vasilopoulos, Athanasios, Büchel, Julian, Camposampiero, Giacomo, Gallo, Manuel Le, Rasch, Malte, Sebastian, Abu
Analog-Based In-Memory Computing (AIMC) inference accelerators can be used to efficiently execute Deep Neural Network (DNN) inference workloads. However, to mitigate accuracy losses, due to circuit and device non-idealities, Hardware-Aware (HWA) trai
Externí odkaz:
http://arxiv.org/abs/2401.09859
Autor:
Gallo, Manuel Le, Lammie, Corey, Buechel, Julian, Carta, Fabio, Fagbohungbe, Omobayode, Mackin, Charles, Tsai, Hsinyu, Narayanan, Vijay, Sebastian, Abu, Maghraoui, Kaoutar El, Rasch, Malte J.
Publikováno v:
APL Machine Learning (2023) 1 (4): 041102
Analog In-Memory Computing (AIMC) is a promising approach to reduce the latency and energy consumption of Deep Neural Network (DNN) inference and training. However, the noisy and non-linear device characteristics, and the non-ideal peripheral circuit
Externí odkaz:
http://arxiv.org/abs/2307.09357
Autor:
Benmeziane, Hadjer, Lammie, Corey, Boybat, Irem, Rasch, Malte, Gallo, Manuel Le, Tsai, Hsinyu, Muralidhar, Ramachandran, Niar, Smail, Hamza, Ouarnoughi, Narayanan, Vijay, Sebastian, Abu, Maghraoui, Kaoutar El
The advancement of Deep Learning (DL) is driven by efficient Deep Neural Network (DNN) design and new hardware accelerators. Current DNN design is primarily tailored for general-purpose use and deployment on commercially viable platforms. Inference a
Externí odkaz:
http://arxiv.org/abs/2305.10459
In-memory computing with resistive crossbar arrays has been suggested to accelerate deep-learning workloads in highly efficient manner. To unleash the full potential of in-memory computing, it is desirable to accelerate the training as well as infere
Externí odkaz:
http://arxiv.org/abs/2303.04721
Autor:
Rasch, Malte J., Mackin, Charles, Gallo, Manuel Le, Chen, An, Fasoli, Andrea, Odermatt, Frederic, Li, Ning, Nandakumar, S. R., Narayanan, Pritish, Tsai, Hsinyu, Burr, Geoffrey W., Sebastian, Abu, Narayanan, Vijay
Analog in-memory computing (AIMC) -- a promising approach for energy-efficient acceleration of deep learning workloads -- computes matrix-vector multiplications (MVMs) but only approximately, due to nonidealities that often are non-deterministic or n
Externí odkaz:
http://arxiv.org/abs/2302.08469
Autor:
Rasch, Malte J., Moreda, Diego, Gokmen, Tayfun, Gallo, Manuel Le, Carta, Fabio, Goldberg, Cindy, Maghraoui, Kaoutar El, Sebastian, Abu, Narayanan, Vijay
We introduce the IBM Analog Hardware Acceleration Kit, a new and first of a kind open source toolkit to simulate analog crossbar arrays in a convenient fashion from within PyTorch (freely available at https://github.com/IBM/aihwkit). The toolkit is u
Externí odkaz:
http://arxiv.org/abs/2104.02184
Autor:
Kim, Hyungjun, Rasch, Malte, Gokmen, Tayfun, Ando, Takashi, Miyazoe, Hiroyuki, Kim, Jae-Joon, Rozen, John, Kim, Seyoung
A resistive memory device-based computing architecture is one of the promising platforms for energy-efficient Deep Neural Network (DNN) training accelerators. The key technical challenge in realizing such accelerators is to accumulate the gradient in
Externí odkaz:
http://arxiv.org/abs/1907.10228
Accelerating training of artificial neural networks (ANN) with analog resistive crossbar arrays is a promising idea. While the concept has been verified on very small ANNs and toy data sets (such as MNIST), more realistically sized ANNs and datasets
Externí odkaz:
http://arxiv.org/abs/1906.02698