Zobrazeno 1 - 9
of 9
pro vyhledávání: '"Ram Sadhwani"'
Autor:
Yi-Shin Yeh, Hyung-Jin Lee, Surej Ravikumar, Neelam Prabhu Gaunkar, Jeffery W. Bates, Jessica C. Chou, Mario Weiss, Mauricio Marulanda, Qiang Yu, Thomas W. Brown, Georgios C. Dogiamis, Jag Rangaswamy, Iwen Huang, Dimitri Frolov, Zinia Tuli, Ram Sadhwani, Triveni S. Rane, Ye Seul Nam, Carlos Nieva, Vijaya B. Neeli, Cho-Ying Lu, Said Rami, Henning Braunisch, Hariprasad Chandrakumar, Telesphor Kamgaing, D. Correas-Serrano
Publikováno v:
VLSI Circuits
A 134 GHz 16 QAM fully-packaged transceiver system for dielectric waveguides with >12 GHz of RF bandwidth built in 22nm CMOS achieves a measured EVM of -19.8 dB (~5x10-6 BER) at a reach of 3 meters at a 50 Gbps data rate at a total power consumption
Autor:
Sang-Min Yoo, Ram Sadhwani, Jacques C. Rudell, Ofir Degani, Benjamin Jann, Jeffrey S. Walling, David J. Allstot
Publikováno v:
IEEE Journal of Solid-State Circuits. 48:1212-1224
A switched-capacitor power amplifier (SCPA) that realizes an envelope elimination and restoration/polar class-G topology is introduced. A novel voltage-tolerant switch enables the use of two power supply voltages which increases efficiency and output
Autor:
Benjamin Jann, Ofir Degani, Ram Sadhwani, Sang-Min Yoo, David J. Allstot, Jeffrey S. Walling, Jacques C. Rudell
Publikováno v:
2012 IEEE Radio Frequency Integrated Circuits Symposium.
A digitally-controlled switched-capacitor RF power amplifier (SCPA) that uses a dual-supply voltage, class-G architecture is implemented in 65nm CMOS. It implements signal envelope digital-to-analog conversion using switching functions controlled by
Publikováno v:
RWS
This paper presents RF front end architecture and design techniques to enable co-existence among multiple standards in multi-comm SOC products. The design practices presented in this paper are derived from two generation of products designed in 90nm
Publikováno v:
CICC
A technique to build overlapped inductors at the same location while keeping good isolation between them is presented. The key idea is to use magnetic and electric cancellation to reduce coupling. A shared LNA for WiFi and Bluetooth (BT) applications
Publikováno v:
2011 IEEE Radio Frequency Integrated Circuits Symposium.
We report a novel harmonic LOG based direct conversion RF transceiver for 802.11n radio. This multi-comm transceiver consists of Bluetooth SoC and WiFi, it includes 19–24GHz VCO, integrated front-end including WiFi T/R and WiFi-BT switches. Fabrica
Publikováno v:
2010 IEEE Radio Frequency Integrated Circuits Symposium.
A highly linear LO generation architecture for direct up/down conversion transceiver is designed in standard 45nm 1.15V digital CMOS process. The spectral purity is better than 50dBc for WiFi and 45dBc for WiMax. The frequency plan is targeted to ove
Single-chip WiFi b/g/n 1×2 SoC with fully integrated front-end & PMU in 90nm digital CMOS technology
Autor:
A. Ly, Ram Sadhwani, M. Smith, A. Oster, Ofir Degani, Jonathan Jensen, H. Shang, I. Ben-bassat, A. Fridman, Adil A. Kidwai, S. Porat, Benjamin Jann, C. Chu, M. Sharkansky
Publikováno v:
2010 IEEE Radio Frequency Integrated Circuits Symposium.
We report a compact 802.11b/g/n MIMO SoC with fully integrated transceiver, on-chip PMU including dc-dc converters, PHY, MAC, PCIe and a non-volatile memory. The transceiver includes on-chip PA, LNA and T/R switch. Fabricated in 90nm standard digital
Publikováno v:
2008 IEEE Radio Frequency Integrated Circuits Symposium.
An Ultra Low Insertion loss T/R switch fully integrated with 802.11 b/g/n direct conversion transceiver front end in 90 nm CMOS. The receiver achieves 3.6 dB NF at 2.4 GHz. The T/R switch has been designed and tested and has 0.3 dB insertion loss in