Zobrazeno 1 - 10
of 14
pro vyhledávání: '"Ralph D. Wittig"'
Autor:
Martin L. Voogel, Yohan Frans, Faisal Dada, Ralph D. Wittig, Ehab Mohsen, Trevor J. Bauer, Matt Ouellette, Dastidar Jaideep, Mike Thompson, Jason Coppens, Gaurav Singh, Sagheer Ahmad
Publikováno v:
Hot Chips Symposium
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ea6518c89e23b0e37ad856a04ca554ea
https://doi.org/10.1109/hcs49909.2020.9220682
https://doi.org/10.1109/hcs49909.2020.9220682
Autor:
Juanjo Noguera, Sridhar Subramanian, Ralph D. Wittig, Shankar Lakka, Gaurav Singh, Vamsi Boppana, Sagheer Ahmad, Fu-Hing Ho, Tomai Knopp
Publikováno v:
Hot Chips Symposium
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6bd6b2338ad9d3365067c72a4ed73be3
https://doi.org/10.1109/hotchips.2019.8875639
https://doi.org/10.1109/hotchips.2019.8875639
Autor:
Vamsi Boppana, Vinod K. Kathail, Ilya K. Ganusov, Vidya Rajagopalan, Ralph D. Wittig, Sagheer Ahmad
Publikováno v:
IEEE Micro. 36:48-62
This article presents the Zynq UltraScale+ MPSoC (multiprocessor system on chip), which builds on the Zynq-7000 family. Compared to the first-generation Zynq, MPSoC increases performance and power efficiency while significantly improving the integrat
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8c854debaf312e2fad9e92ecf1104588
https://doi.org/10.1109/mm.2016.18
https://doi.org/10.1109/mm.2016.18
Autor:
Paul Chow, Arun Patel, Daniel Nunes, Henry E. Styles, Andrew Putnam, Ralph D. Wittig, Danyao Wang, Manuel Saldana, Christopher A. Madill
Publikováno v:
ACM Transactions on Reconfigurable Technology and Systems. 3:1-29
High-Performance Reconfigurable Computers (HPRCs) consist of one or more standard microprocessors tightly-coupled with one or more reconfigurable FPGAs. HPRCs have been shown to provide good speedups and good cost/performance ratios, but not necessar
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a4cd2ad4bad36cf3eeb587ed427f7822
https://doi.org/10.1145/1862648.1862652
https://doi.org/10.1145/1862648.1862652
Autor:
Jasmina Vasiljevic, Henry E. Styles, Ralph D. Wittig, Fernando Martinez Vallina, Paul Chow, Paul R. Schumacher, Jeff Fifield
Publikováno v:
FPT
In recent years, high-level languages and compilers, such as OpenCL have improved both productivity and FPGA adoption on a wider scale. One of the challenges in the design of high-performance stream FPGA applications is iterative manual optimization
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dfb5fa4c3385991d3bbc6623adf601bb
https://doi.org/10.1109/fpt.2015.7393134
https://doi.org/10.1109/fpt.2015.7393134
Autor:
Vidya Rajagopalan, Sagheer Ahmad, Ralph D. Wittig, Vinod K. Kathail, Ilya K. Ganusov, Vamsi Boppana
Publikováno v:
Hot Chips Symposium
This article consists of a collection of slides from the authors' conference presentation. Zynq UltraScale+ MPSoC: 2nd Generation SoC from Xilinx - Applications processing, Real-time, Graphics, Video, Serial connectivity - Power management, Safety, S
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3545207fa4d450d049831a3b262c655b
https://doi.org/10.1109/hotchips.2015.7477457
https://doi.org/10.1109/hotchips.2015.7477457
Autor:
Ralph D. Wittig, Krste Asanovic
Publikováno v:
IEEE Micro. 31:3-5
This introduction to the special issue provides a snapshot and a sampling of current activity related to the architecture and design of big chips.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0678ccb5312edec8d27305e759847144
https://doi.org/10.1109/mm.2011.72
https://doi.org/10.1109/mm.2011.72
Publikováno v:
2011 IEEE Hot Chips 23 Symposium (HCS).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ca6f59ab7521b2830d703e4ee8a4efcc
https://doi.org/10.1109/hotchips.2011.7477495
https://doi.org/10.1109/hotchips.2011.7477495
Autor:
Brad Taylor, Ralph D. Wittig
Publikováno v:
2010 IEEE Hot Chips 22 Symposium (HCS).
This article consists of a collection of slides from the author's conference presentation on the Xilinx 7 Series FPGA family of products. Some of the specific topics discussed include: the special features, system specifications, and system design fo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::32d8880ddae215936ec3036644a64b71
https://doi.org/10.1109/hotchips.2010.7480077
https://doi.org/10.1109/hotchips.2010.7480077
Autor:
Ralph D. Wittig, Andrew Putnam, Susan J. Eggers, Eric F. Dellinger, Jeffrey M. Mason, Henry E. Styles, Dave Bennett, Prasanna Sundararajan
Publikováno v:
FPGA
ISCA
ISCA
Many-cache is a memory architecture that efficiently supports caching in commercially available FPGAs. It facilitates FPGA programming for high-performance computing (HPC) developers by providing them with memory performance that is greater and power
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::cc5248e7415cbf28b295f6e23e1ad6ac
https://doi.org/10.1145/1508128.1508189
https://doi.org/10.1145/1508128.1508189