Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Ralf Rudolf"'
Autor:
Ralf Rudolf, Nicolas Nagel, Marko Lemke, Rolf Wei, Martin Bartels, Thomas Bertrams, Knut Stahrenberg, Marco Müller, Ahmed Mahmoud
Publikováno v:
2019 31st International Symposium on Power Semiconductor Devices and ICs (ISPSD).
Over decades the usage of the charge compensation principle for power devices has improved the performance and efficiency of typical applications in almost all voltage classes like power supplies, converters and drives. Different types of charge comp
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4cc78211c3c265ef2aba81242611a86b
https://doi.org/10.1109/ispsd.2019.8757604
https://doi.org/10.1109/ispsd.2019.8757604
Autor:
Martin Pinkert, Ralf Rudolf, Marc Strasser, Catejan Wagner, Hagen Roetz, Stefan Doering, Andre Wachowiak, Stefan Eckl, Thomas Mikolajick
Publikováno v:
Microelectronics Reliability. 54:2128-2132
Scanning Spreading Resistance Microscopy (SSRM) is successfully applied to investigate failing nLDMOS test devices that exhibit a lowered break down voltage (BVDSS) in electrical test. Cross-sectional, two-dimensional maps of the local sample resisti
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2e6c43147340b5f2657c803c375e0303
https://doi.org/10.1016/j.microrel.2014.07.021
https://doi.org/10.1016/j.microrel.2014.07.021
Publikováno v:
Microelectronics Reliability. 54:1883-1886
Hot carrier (HC) injection, inducing drain and gate leakage current increase in 5 nm oxide p-channel LDMOS transistors, is investigated. Devices with two different drain implants are studied. At low gate voltage ( V GS ) and high drain voltage ( V DS
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c4c2312986a681941ec8b6e55c602b47
https://doi.org/10.1016/j.microrel.2014.07.048
https://doi.org/10.1016/j.microrel.2014.07.048
Autor:
B. Elattari, Marc Strasser, Ralf Rudolf, Dionyz Pogany, Erich Gornik, Matthias Stecher, A. Podgaynaya
Publikováno v:
Microelectronics Reliability. 50:1347-1351
Electro-thermal destruction of n- and p-channel lateral double-diffused MOS in smart power ICs is investigated by electrical pulse experiments, simulations and failure analysis. It was observed experimentally and by TCAD simulation that the location
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c12967c2a7cf4842f52b829b72ef4d3a
https://doi.org/10.1016/j.microrel.2010.07.075
https://doi.org/10.1016/j.microrel.2010.07.075
Publikováno v:
IEEE Electron Device Letters. 31:1440-1442
Numerical TCAD and transmission line pulse analysis of an electrical safe operating area of a robust p-channel lateral DMOS transistor is performed. The observed independence of the trigger current on the applied gate-source voltage is attributed to
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fde457ac701e2d126b14eb58ed5ca047
https://doi.org/10.1109/led.2010.2081337
https://doi.org/10.1109/led.2010.2081337
Autor:
Christian Schlunder, Hans Reisinger, Stefano Aresu, Ralf Rudolf, Wolfgang Gustin, Rolf-Peter Vollertsen
Publikováno v:
2012 IEEE International Reliability Physics Symposium (IRPS).
Hot carrier injection, inducing source-drain current (I DS ) increase in p-channel LDMOS transistors, is investigated. At low gate voltage (V GS ) and high drain voltage (V DS ), reduction of the on-resistance (R ON ) is observed [1, 5]. However, it
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5b2da361586312073e3cb97e3e13ac4d
https://doi.org/10.1109/irps.2012.6241941
https://doi.org/10.1109/irps.2012.6241941
Autor:
Barbara Kuhn-Heinrich, Marc Strasser, Lincoln O'Riain, Stefano Aresu, Matthias Stecher, Alevtina Mayerhofer, Birgit von Ehrenwall, Cajetan Wagner, Ralf Rudolf, Paul Kuepper, Andreas von Ehrenwall, Karl-Heinz Gebhardt, Ulrich Glaser
Publikováno v:
2011 IEEE 23rd International Symposium on Power Semiconductor Devices and ICs.
In this paper a 130 nm BCD technology platform is presented. The process offers logic-devices, flash-devices and high voltage devices with rated voltages up to 60 V. There are HV analog devices with variable channel length and HV power devices with l
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5fce1e8838b46d15db466559b922d9ea
https://doi.org/10.1109/ispsd.2011.5890780
https://doi.org/10.1109/ispsd.2011.5890780