Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Rajnish Ghughal"'
Publikováno v:
Lecture Notes in Computer Science ISBN: 9783319064093
FM
FM
Verification of a Floating Point Unit FPU has always been a challenging task and its completeness is always a question. Formal verification FV guarantees 100% coverage and is usually the sign-off methodology for FPU verification. At Intel®, Symbolic
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4012ed0e13c83289f39cf960d3b6c840
https://doi.org/10.1007/978-3-319-06410-9_45
https://doi.org/10.1007/978-3-319-06410-9_45
Autor:
Naren Narasimhan, Amber Telfer, Armaghan W. Naik, Anna Slobodová, Roope Kaivola, Erik Reeber, Vladimir A. Frolov, Christopher Taylor, Sudhindra Pandav, Jesse Whittemore, Rajnish Ghughal
Publikováno v:
Computer Aided Verification ISBN: 9783642026577
Formal verification of arithmetic datapaths has been part of the established methodology for most Intel processor designs over the last years, usually in the role of supplementing more traditional coverage oriented testing activities. For the recent
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b8c55a25c3d26a3cedc8e72ca0cadfd4
https://doi.org/10.1007/978-3-642-02658-4_32
https://doi.org/10.1007/978-3-642-02658-4_32
Publikováno v:
Formal Methods in Computer-Aided Design ISBN: 9783540412199
Lecture Notes in Computer Science ISBN: 9783540425410
CHARME
Lecture Notes in Computer Science ISBN: 9783540425410
CHARME
The LTL model checker that we use provides sound decomposition mechanisms within a purely model checking environment.We have exploited these mechanisms to successfully verify a wide spectrum of large and complex circuits. This paper describes a varie
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::03a136910f4b9604d242f1d322b7cede
https://doi.org/10.1007/3-540-40922-x_1
https://doi.org/10.1007/3-540-40922-x_1
Autor:
Ganesh Gopalakrishnan, Rajnish Ghughal
Publikováno v:
Lecture Notes in Computer Science ISBN: 9783540674429
IPDPS Workshops
IPDPS Workshops
The problem of verifying finite-state models of shared memory multiprocessor coherence protocols for conformance to weaker memory consistency models is examined. We start with W.W. Collier's architectural testing methods and extend it in several non-
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c4f939d856226ea770ec9b03688cabe4
https://doi.org/10.1007/3-540-45591-4_135
https://doi.org/10.1007/3-540-45591-4_135
Publikováno v:
Computer Aided Verification ISBN: 9783540646082
CAV
CAV
We offer a solution to the problem of verifying formal memory models of processors by combining the strengths of model-checking and a formal testing procedure for parallel machines. We characterize the formal basis for abstracting the tests into test
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0a1647bb2d03bb9443c3537bd8cbd0d6
https://doi.org/10.1007/bfb0028767
https://doi.org/10.1007/bfb0028767
Publikováno v:
SPAA
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c90601a62ecd5126c89b0f703921a737
https://doi.org/10.1145/277651.277689
https://doi.org/10.1145/277651.277689
