Zobrazeno 1 - 10
of 12
pro vyhledávání: '"Rajiv Nishtala"'
Publikováno v:
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Universitat Politècnica de Catalunya (UPC)
Many HPC applications suffer from a bottleneck in the shared caches, instruction execution units, I/O or memory bandwidth, even though the remaining resources may be underutilized. It is hard for developers and runtime systems to ensure that all crit
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::3605c28e17ed8f9efbb17aba5f9ec029
http://arxiv.org/abs/2103.09019
http://arxiv.org/abs/2103.09019
Publikováno v:
HPCA
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
IEEE Symposium on High-Performance Computer Architecture (HPCA)
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
IEEE Symposium on High-Performance Computer Architecture (HPCA)
Many of the important services running on data centres are latency-critical, time-varying, and demand strict user satisfaction. Stringent tail-latency targets for colocated services and increasing system complexity make it challenging to reduce the p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::c3dc55b7283704c263f8feee2f0d0384
https://hdl.handle.net/2117/328242
https://hdl.handle.net/2117/328242
Publikováno v:
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
CF
Universitat Politècnica de Catalunya (UPC)
CF
Disaggregated memory has recently been proposed as a way to allow flexible and fine-grained allocation of memory capacity to compute jobs. This paper makes an important step towards effective resource allocation on disaggregated memory systems. Speci
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::600dc52130bb78248370638c6ed6b9f0
Publikováno v:
SBAC-PAD
Many server applications achieve only a fraction of their theoretical peak performance due to bottlenecks in the shared caches, instruction execution units, I/O or memory bandwidth, even though the remaining resources may be underutilized. It is very
Publikováno v:
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Lecture Notes in Computer Science ISBN: 9783030343552
ISC Workshops
Universitat Politècnica de Catalunya (UPC)
Lecture Notes in Computer Science ISBN: 9783030343552
ISC Workshops
In a virtualized computing server (node) with multiple Virtual Machines (VMs), it is necessary to dynamically allocate memory among the VMs. In many cases, this is done only considering the memory demand of each VM without having a node-wide view. Th
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::788bc4a654413dc31e9c3bf48201f245
Publikováno v:
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Recercat. Dipósit de la Recerca de Catalunya
instname
Universitat Politècnica de Catalunya (UPC)
Recercat. Dipósit de la Recerca de Catalunya
instname
In 2013, U.S. data centers accounted for 2.2% of the country’s total electricity consumption, a figure that is projected to increase rapidly over the next decade. Many important data center workloads in cloud computing are interactive, and they dem
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::c88aa38998baafcb9a8e57bf7c84855c
https://hdl.handle.net/2117/113158
https://hdl.handle.net/2117/113158
Publikováno v:
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
SBAC-PAD
Recercat. Dipósit de la Recerca de Catalunya
instname
Universitat Politècnica de Catalunya (UPC)
SBAC-PAD
Recercat. Dipósit de la Recerca de Catalunya
instname
One of the main challenges in data center systems is operating under certain Quality of Service (QoS) while minimizing power consumption. Increasingly, data centers are adopting heterogeneous server architectures with different power-performance trad
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::f12083b903836b0aec052d99e92c1c0f
http://hdl.handle.net/2117/100954
http://hdl.handle.net/2117/100954
Autor:
Rajiv Nishtala, Xavier Martorell
Publikováno v:
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Recercat. Dipósit de la Recerca de Catalunya
instname
IGSC
Universitat Politècnica de Catalunya (UPC)
Recercat. Dipósit de la Recerca de Catalunya
instname
IGSC
Configuration of hardware knobs in multicore environments for meeting performance-power demands constitutes a desirable feature in modern data centers. At the same time, high energy efficiency (performance per watt) requires optimal thread-to-core as
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::4d604c2e9a0cf51cbbe8cc1c75b3eb6e
http://hdl.handle.net/2117/105096
http://hdl.handle.net/2117/105096
Publikováno v:
ICPP Workshops
Data centers have time-varying traffic and a wide range of demands in performance-power for the workloads. Understanding the trade-offs between performance and power for these varying types of demands given the time-variations, helps administrators t
Publikováno v:
2013 Proceedings of the International Conference on Embedded Software (EMSOFT).