Zobrazeno 1 - 10
of 15
pro vyhledávání: '"Rajesh Sathiyanarayanan"'
Publikováno v:
2022 IEEE International Conference on Emerging Electronics (ICEE).
Publikováno v:
2020 5th IEEE International Conference on Emerging Electronics (ICEE).
Publikováno v:
Journal of Vacuum Science & Technology A. 39:062601
Ion treatment of face-centered cubic and amorphous TaN films is studied using classical molecular dynamics simulations. We investigated the effect of ion type (Ne, Ar, Kr, and Xe) and its energy (50, 100, 150, and 200 eV) on the sputtering yield of T
Autor:
Injo Ok, Tenko Yamashita, Su Chen Fan, Vijay Narayanan, Takashi Ando, Shahrukh A. Khan, Huiming Bu, Patrick W. DeHaven, Rajesh Sathiyanarayanan, Rajan K. Pandey, Anita Madan, Q. Yuan, A. Dasgupta, M. Chace
Publikováno v:
2015 IEEE International Electron Devices Meeting (IEDM).
We identified unique device width and length dependencies of Vt for FinFET Replacement Metal Gate (RMG). Choice of fill metal is important to obtain a flat Vt-Wdes trend. We proposed a new model for Vt-Lg roll-up for High-k last RMG and demonstrated
Publikováno v:
The Journal of Physical Chemistry C. 115:18983-18990
We use molecular dynamics simulations to study the role played by solvent in promoting anisotropic growth of colloidal nanostructures. Considering the growth of Ag nanowires and nanoplates in organic solvent, we study how solvent influences the aggre
Publikováno v:
Surface Science. 603:2387-2392
We have parameterized the various interactions between Cu adatoms on Cu(1 1 0) using density-functional theory based ab-initio calculations. Our results indicate that in addition to pair interactions, 3-adatom and 4-adatom interactions of significant
Publikováno v:
Surface Science. 602:1243-1249
Using ab-initio density functional theory, we have calculated the difference between A- and B-step formation energies on Pt(1 1 1) from orientation-dependent trio interactions. Our results show that the ratio of step formation energies is dependent o
Autor:
T. Hook, Pavan S. Chinthamanipeta, James Chingwei Li, Richard G. Southwick, Balasubramanian S. Pranatharthi Haran, T. Gow, James H. Stathis, Veeraraghavan S. Basker, Rajesh Sathiyanarayanan, Donald F. Canaperi, C-H. Lin, S. Kanakasabapathy, Zuoguang Liu, F. Chen, A. Bryant, Anita Madan, Leo Tai, Kota V. R. M. Murali, Sanjay Mehta, Yiping Yao, Tenko Yamashita, Mukesh Khare, Huiming Bu, R. Kambhampati, Marinus Hopstaken, Z. Zhu, Shahrukh A. Khan, P. Oldiges, Amit Kumar, William K. Henson, Stephan A. Cohen, Shreesh Narasimha, D. McHerron, Darsen D. Lu, J. Johnson
Publikováno v:
2015 Symposium on VLSI Technology (VLSI Technology).
FinFET has become the mainstream logic device architecture in recent technology nodes due to its superior electrostatic and leakage control [1,2,3,4]. However, parasitic capacitance has been a key performance detractor in 3D FinFETs. In this work, a
Autor:
Sandip De, Rainer Loesing, Rajesh Sathiyanarayanan, Rajan K. Pandey, H.G. Parks, Srini Raghavan, Shahab Siddiqui, Min Dai, Erdem Kaltalioglu
Publikováno v:
Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena. 35:012202
In this study, the authors investigate the impact of radical oxygen plasma on nitrided and annealed atomic layer deposited (ALD) SiO2 as a thick gate oxide (1.65–3 V) with a high-k/metal gate transistor. Time-dependent-dielectric-breakdown voltage,
Publikováno v:
Physical Review B. 83