Zobrazeno 1 - 10
of 17
pro vyhledávání: '"Rajen Murugan"'
Publikováno v:
2022 IEEE Electrical Design of Advanced Packaging and Systems (EDAPS).
Autor:
Jie Chen, Rajen Murugan, Sooping Saw, Francisco Lauzurique, John Broze, Craig Greenberg, Alex Triano, Bibhu Nayak, Harikiran Muniganti, Joe Sivaswamy, Dipanjan Gope
Publikováno v:
2022 IEEE 31st Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS).
Autor:
Aditya N. Jogalekar, Oscar F. Medina, Andrew Blanchard, Rashaunda Henderson, Mahadevan K. Iyer, Hassan Ali, Rajen Murugan, Tony Tang
Publikováno v:
2022 IEEE 31st Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS).
Publikováno v:
2022 IEEE 31st Conference on Electrical Performance of Electronic Packaging and Systems (EPEPS).
Autor:
Aditya N. Jogalekar, Oscar F. Medina, Andrew Blanchard, Rashaunda Henderson, Mahadevan K. Iyer, Tony Tang, Rajen Murugan, Hassan Ali
Publikováno v:
2022 IEEE 72nd Electronic Components and Technology Conference (ECTC).
Publikováno v:
International Symposium on Microelectronics. 2020:000015-000020
Generally, IC packages with exposed pads have excellent thermal and electrical performance – assuming high fidelity and integrity of die attach material. However, reliability challenges associated with die attach impacts electrical performance of v
Autor:
Aditya N. Jogalekar, Oscar F. Medina, Andrew Blanchard, Rashaunda Henderson, Mahadevan K. Iyer, Tony Tang, Rajen Murugan, Hassan Ali
Publikováno v:
2021 IEEE MTT-S International Microwave and RF Conference (IMARC).
Publikováno v:
2020 IEEE 70th Electronic Components and Technology Conference (ECTC).
The drive for highly integrated ultrasonic scanners electronics stems from the ever-increasing demand for portable, high-quality miniaturize ultrasound imaging systems. Integration drives design complexities due to increase electromagnetic interactio
Publikováno v:
International Symposium on Microelectronics. 2018:000180-000185
In this paper we detail the system (viz. silicon-package-pcb) electrical co-design of a 130nm BiCMOS high-speed (25Gbps) 4-channel multi-rate retimer, packaged in a small 6-mm × 6-mm FC BGA package, with integrated advanced signal conditioning circu
Autor:
Steven Kummerl, Edwin Lim, Usman M. Chaudhry, Jack Grantham, Rajen Murugan, Tatsuhiro Shimizu, Jie Chen, Thatcher Klumpp
Publikováno v:
International Symposium on Microelectronics. 2018:000193-000197
In this paper, we detailed the system (die + package + pcb) electrothermal co-design modeling and silicon validation effort that led to the industry's first, highly accurate, voltage-output current-sense amplifier. By integrating and co-designing the