Zobrazeno 1 - 10
of 23
pro vyhledávání: '"Rajeev Malik"'
Publikováno v:
International Journal of Current Microbiology and Applied Sciences. 8:2817-2826
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::058a573716c20e1e6493dcf480a6bf4c
https://doi.org/10.20546/ijcmas.2019.802.331
https://doi.org/10.20546/ijcmas.2019.802.331
Publikováno v:
Prabandhan: Indian Journal of Management. 12:23
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1f6ee69bff2d70ce945d7df834cfff82
https://doi.org/10.17010/pijom/2019/v12i2/141754
https://doi.org/10.17010/pijom/2019/v12i2/141754
Autor:
Michael V. Aquilino, Brian W. Messenger, Paul D. Agnello, Oh Jung Kwon, Bhupesh Chandra, T. Tzou, T. Kirahata, Shreesh Narasimha, Daniel J. Poindexter, S.S. Iyer, Erik A. Nelson, William Y. Chang, Geng Wang, K. V. Hawkins, Jaeger Daniel, Gregory G. Freeman, S. Rombawa, Chengwen Pei, Rajendran Krishnasamy, W. Davies, Karen A. Nummy, James P. Norum, Paul C. Parries, Norman Robson, Jinping Liu, X. Wang, Rajeev Malik, Christopher D. Sheraw, X. Chen, Jeffrey B. Johnson, Xin Li, W. Kong, Ming Yin, N. Arnold, Edward P. Maciejewski, Katsunori Onishi
Publikováno v:
2014 IEEE International Electron Devices Meeting.
This paper presents the industry's smallest Embedded Dynamic Random Access Memory (eDRAM) implemented in IBM's 22nm SOI technology. The bit cell area of 0.026µm2 achieves ∼60% scaling over the previous generation with deep trench (DT) capacitance
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::66ec91f5b274f3f393e4cdb66ce3356c
https://doi.org/10.1109/iedm.2014.7047083
https://doi.org/10.1109/iedm.2014.7047083
Autor:
Erdogan Guljari, Rajeev Malik
Publikováno v:
Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films. 15:2219-2225
Single crystal silicon thin films have been grown on Si(100) substrates using pulsed supersonic jets of a disilane (Si2H6)-hydrogen mixture. Digital epitaxy has been achieved at substrate temperatures of 400–500 °C, with a growth rate of 0.1 A/pul
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c528f5cf03a3e5aa0f2ae626e290d0f7
https://doi.org/10.1116/1.580537
https://doi.org/10.1116/1.580537
Autor:
Basanth Jagannathan, D. Faken, N. Zhan, Manoj Kumar, B. Cipriany, James P. Norum, K. Greiner, S. Breit, Karen A. Nummy, D. Fried, Shreesh Narasimha, B. Zhang, Rajeev Malik, Paul D. Agnello, Gregory Costrini, J. Meiring, Katsunori Onishi, H. Nanjundappa, Ahmed N. Noemaun, Christopher D. Sheraw, Stephen S. Furkay
Publikováno v:
2013 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD).
We present a technology development methodology that relies on 3D virtual fabrication to rapidly improve yield by increasing tolerance to multilevel process variation. This methodology has been successfully implemented in the development and yield ra
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e1abce879f5e1cafa7541e0a6f16ff19
https://doi.org/10.1109/sispad.2013.6650583
https://doi.org/10.1109/sispad.2013.6650583
Autor:
Michael V. Aquilino, Jaeger Daniel, J. Koshy, E. Engbrecht, Edward P. Maciejewski, L. Zhuang, Mahender Kumar, G. Costrini, J. Gill, Paul D. Agnello, Rajeev Malik, Jin Cai, Gregory G. Freeman, S. Lucarini, N. Arnold, Geng Wang, David M. Fried, Matthew W. Stoker, R. Bolam, Dimitris P. Ioannou, Katsunori Onishi, Paul C. Parries, Richard Wise, Alvin G. Thomas, Min Dai, Viorel Ontalus, Jessica Dechene, Shreesh Narasimha, Robert R. Robison, Judson R. Holt, Dechao Guo, Paul Chang, Naftali E. Lustig, Michael P. Chudzik, Basanth Jagannathan, Paul S. McLaughlin, Bernard A. Engel, Xiaolin Li, Amit Kumar, W. Kong, Rishikesh Krishnan, Barry P. Linder, J. Norum, C. DeWan, Claude Ortolland, Karen A. Nummy, Michael A. Gribelyuk, Jae Gon Lee, Christopher D. Sheraw, G. Han, C-H. Lin, Benjamin Cipriany, Takashi Ando, N. Habib, J. Johnson
Publikováno v:
2012 International Electron Devices Meeting.
We present a fully-integrated SOI CMOS 22nm technology for a diverse array of high-performance applications including server microprocessors, memory controllers and ASICs. A pre-doped substrate enables scaling of this third generation of SOI deep-tre
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8c61f3f0814bd02ce1388effadad931e
https://doi.org/10.1109/iedm.2012.6478971
https://doi.org/10.1109/iedm.2012.6478971
Publikováno v:
Journal of Crystal Growth. 150:984-988
Epitaxy of silicon using a non-Maxwellian beam source is demonstrated. Pulses of monoenergetic, high kinetic energy supersonic beams of a Si 2 H 6 -H 6 mixture are directed at the substrate leading to epitaxial growth. Reflection high energy electron
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::49edb93c191af19bebf9b1b087dfd778
https://doi.org/10.1016/0022-0248(95)80087-s
https://doi.org/10.1016/0022-0248(95)80087-s
Autor:
Rajeev Malik, Rishikesh Krishnan, Sunfei Fang, Bernhard Wunder, Kevin McStay, Yanli Zhang, Sadanand V. Deshpande, Douglas Daley, Herbert L. Ho, Sneha Gupta, Paul C. Parries, Balaji Jayaraman, Sungjae Lee, Puneet Goyal, John E. Barth, Scott R. Stiffler, Paul D. Agnello, Subramanian S. Iyer
Publikováno v:
ICICDT
In this paper, we present a systematic performance study and modeling of on-chip deep trench (DT) decoupling capacitors for high-performance SOI microprocessors. Based on system-level simulations, it is shown that the DT decoupling capacitors (decap)
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::83d6b2dd06f89254c9ba9a3578b0ab30
https://doi.org/10.1109/icicdt.2012.6232872
https://doi.org/10.1109/icicdt.2012.6232872
Publikováno v:
Journal of Applied Physics. 73:5193-5196
A Langmuir–Hinshelwood‐type kinetic model is developed for modeling growth of silicon–germanium alloys from disilane and germane on Si substrates. Gas source molecular beam epitaxy was employed to grow Si1−xGex films at various germanium frac
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6c1a8c1fb838012ec4b4c14700de7ba3
https://doi.org/10.1063/1.353745
https://doi.org/10.1063/1.353745
Autor:
Gregory G. Freeman, Chengwen Pei, S.S. Iyer, J. Safran, Rajeev Malik, Geng Wang, Carl J. Radens, Paul C. Parries
Publikováno v:
2010 IEEE International SOI Conference (SOI).
The transition to multicore computing demands more embedded cache memories. Incorporating high performance eDRAMs into the cache hierarchy is an attractive solution. In this paper, we discuss the roles of SRAM, eDRAM and eFUSE OTPROM in a high perfor
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b3742f129b8efd84bc708202a7849b5d
https://doi.org/10.1109/soi.2010.5641468
https://doi.org/10.1109/soi.2010.5641468