Zobrazeno 1 - 10
of 11
pro vyhledávání: '"Rajat Chaudhry"'
Publikováno v:
EDA for IC Implementation, Circuit Design, and Process Technology ISBN: 9781315221694
Industrial Information Technology ISBN: 9780849379246
Industrial Information Technology ISBN: 9780849379246
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::dfda52877d4359b11e3c13d597f6483f
https://doi.org/10.1201/9781420007954-20
https://doi.org/10.1201/9781420007954-20
Autor:
M. Bolliger, James D. Warnock, Charles Ray Johns, Paul Marlan Harvey, S. Weitzel, D. Cox, Daniel Lawrence Stasiak, Atsushi Kameyama, David William Boerstler, Harm Peter Hofstee, Masakazu Suzuoki, D. Pham, J. Pille, Y. Masubuchi, Rajat Chaudhry, J. Keaty, P. Harvey, D. Wendel, T. Aipperspach, Osamu Takahashi, S. Posluszny, Kazuaki Yazawa, Mydung Pham, J. Kahle, Mack W. Riley
Publikováno v:
IEEE Journal of Solid-State Circuits. 41:179-196
This paper reviews the design challenges that current and future processors must face, with stringent power limits, high-frequency targets, and the continuing system integration trends. This paper then describes the architecture, circuit design, and
Autor:
D. Wendel, Rajat Chaudhry, S. Posluszny, Daniel Lawrence Stasiak, James D. Warnock, S. Weitzel, Michael Fan Wang, D. Cox
Publikováno v:
IEEE Micro. 25:71-78
Power consumption is a major challenge in VLSI design. Power-constrained designs must attack power reduction with many techniques and require tools to accurately predict the power consumption. These tools give designers feedback on the efficiency of
Publikováno v:
ASP-DAC
Power consumption is one of the major challenges in VLSI Design. Power constrained designs need tools to accurately predict the power consumption and provide feedback to designers on the efficiency of the power management logic. In this paper we pres
Publikováno v:
VLSI Design
Due to higher power and faster switching frequencies, a very robust power distribution network is required. To achieve this the power distribution network needs to be modeled accurately at different stages of the design cycle. We present a methodolog
Publikováno v:
DAC
We present a novel approach to compress current signatures for IR-drop analysis of large power grids. Our approach divides the original current signature into error bounded compression sets. Each compression set has a representative timepoint. The co
Publikováno v:
ISLPED
We present new modeling and simulation techniques to improve the accuracy and efficiency of transient analysis of large power distribution grids. These include an accurate model for the inherent decoupling capacitance of non-switching devices, as wel
Publikováno v:
Experts@Minnesota
DAC
DAC
Careful design and verification of the power distribution network of a chip are of critical importance to ensure its reliable performance. With the increasing number of transistors on a chip, the size of the power network has grown so large as to mak
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::da764fdbd9ae8d306190cfc70abe8da5
https://experts.umn.edu/portal/en/publications/hierarchical-analysis-of-power-distribution-networks(9fec3261-287d-4409-9868-30bdf6cc2a64).html
https://experts.umn.edu/portal/en/publications/hierarchical-analysis-of-power-distribution-networks(9fec3261-287d-4409-9868-30bdf6cc2a64).html
Conference
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Conference
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