Zobrazeno 1 - 5
of 5
pro vyhledávání: '"Raj Verma Purakh"'
Autor:
Madabusi Govindarajan, Rui Tze Toh, Diing Shenp Ang, Shyam Parthasarathy, Tao Sun, Chao Song Zhu, Shaoqiang Zhang, Venkata Sudheer Nune, Yong Koo Yoo, Kok Wai Johnny Chew, Raj Verma Purakh, Jen Shuang Wong
Publikováno v:
2016 IEEE International Electron Devices Meeting (IEDM).
A novel approach to technology integration of system-on-chip RF Front-End Module (FEM) is presented. Device design to achieve best-in-class extended drain power mosfet (EDNMOS) with Ron of 1.6Ohm-mm and f T >39GHz is discussed. This is followed by an
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2b74b55bb5d9f002912424355c3cbbea
https://doi.org/10.1109/iedm.2016.7838031
https://doi.org/10.1109/iedm.2016.7838031
Autor:
Dong Ke, Michael Tiong, Raj Verma Purakh, Ong Shiang Yang, Liu Kun, Koo Jeoung Mo, Mun Nam Chil, Rajesh R. Nair
Publikováno v:
2016 28th International Symposium on Power Semiconductor Devices and ICs (ISPSD).
This paper demonstrates an advanced 300mm 130nm BCD (Bipolar-CMOS-DMOS) automotive grade platform with high modularity. The platform offers logic-devices, flash-devices and high performance power devices with rated voltages up to 85V as well as compl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::95023b264446c105e6b77b20981ab61b
https://doi.org/10.1109/ispsd.2016.7520863
https://doi.org/10.1109/ispsd.2016.7520863
Publikováno v:
2016 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).
Power Amplifier (PA) modules are becoming more and more complex in modern wireless systems. In order to meet the efficiency/linearity design schemes such as Envelope elimination and restoration (EER) and Envelope tracking (ET) are increasingly becomi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ea7c37990836104e164a0317a7609671
https://doi.org/10.1109/rfic.2016.7508262
https://doi.org/10.1109/rfic.2016.7508262
A DC-50 GHz SPDT switch with maximum insertion loss of 1.9 dB in a commercial 0.13-μm SOI technology
Publikováno v:
2015 International SoC Design Conference (ISOCC).
In this paper, a low insertion loss, high isolation, ultra wideband (DC to 50 GHz) single-pole double-throw (SPDT) switch using 0.13 μm SOI technology is presented. The switch is designed by using a series-shunt configuration with input and output m
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::452a31686edfd1010eeadb0e893e6ea8
https://doi.org/10.1109/isocc.2015.7401786
https://doi.org/10.1109/isocc.2015.7401786
Publikováno v:
2015 IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC).
We have developed a cost-optimized 0.18μm BCD technology platform, which provides fully isolated LDMOS devices with competitive specific on-resistance (Rsp) over a range of operating voltages (6V to 30V). In addition, latch-up-free ESD solutions are
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e48e50e2ec44070e5754d49758f7b747
https://doi.org/10.1109/edssc.2015.7285244
https://doi.org/10.1109/edssc.2015.7285244