Zobrazeno 1 - 10
of 14
pro vyhledávání: '"Rainer Loesing"'
Autor:
Jinghong Li, Rainer Loesing, Z. Zhu, Philip L. Flaitz, Anthony G. Domenicucci, Shogo Mochizuki, Vamsi Paruchuri
Publikováno v:
Thin Solid Films. 557:94-100
In this study, the effect of Cluster Carbon implantation and thermal annealing for recrystallization on the properties of phosphorus doped Si (Si:P) epitaxial films was investigated. Several Cluster Carbon implantation conditions and recrystallizatio
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::26d4b494346b1d4058e8918faed8d0d8
https://doi.org/10.1016/j.tsf.2014.01.055
https://doi.org/10.1016/j.tsf.2014.01.055
Autor:
Eric C. T. Harley, Z. Zhu, Judson R. Holt, Matthew W. Stoker, R. Takalkar, L. Black, Rainer Loesing, A. Chakravarti, F. Yang, Dominic J. Schepis, James Chingwei Li, Xiaolin Chen, R. Murphy, Anita Madan, Thomas N. Adam, Abhishek Dube
Publikováno v:
ECS Transactions. 28:63-71
Uniaxial tensile strain in the channel enhances electron mobility and hence the drive current in an N-type field-effect transistor (NFET). For enhancement of NFET drive current via channel strain, the incorporation of embedded silicon carbon (eSi:C)
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f3cbe71f67a20208ceb5421c37d5d386
https://doi.org/10.1149/1.3375589
https://doi.org/10.1149/1.3375589
Autor:
R. Takalkar, Anita Madan, Dominic J. Schepis, Eric C. Harley, Bin Yang, Abhishek Dube, Teresa L. Pinto, Zhibin Ren, Thomas N. Adam, Linda Black, Z. Zhu, Johan W. Weijtmans, Rainer Loesing, Jinghong Li, Ashima B. Chakravarti
Publikováno v:
ECS Transactions. 16:325-332
In addition to device scaling, strain engineering using SiC stressors in the S/D regions is important for nFET performance enhancement [1-3]. In this paper, we review the characterization of fully-strained epitaxial SiC and in-situ doped SiC:P films
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3d314f9756c2842729e426ac06916377
https://doi.org/10.1149/1.2986790
https://doi.org/10.1149/1.2986790
Publikováno v:
Ultramicroscopy. 161
Sample preparation for atom probe tomography of 3D semiconductor devices has proven to significantly affect field evaporation and the reliability of reconstructed data. A cross-sectional preparation method is applied to state-of-the-art Si finFET tec
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::9a3dd959eb576ae4631abd56f9608f25
https://pubmed.ncbi.nlm.nih.gov/26657043
https://pubmed.ncbi.nlm.nih.gov/26657043
Publikováno v:
Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena. 35:021208
The effect of cluster carbon implantation and recrystallization on properties of phosphorus doped Si (Si:P) epitaxial films was investigated. Recrystallization techniques based on solid phase epitaxy with rapid thermal annealing (RTA), spike RTA (sRT
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::00ca7c2f64c67aa59c84241e92ca0705
https://doi.org/10.1116/1.4975923
https://doi.org/10.1116/1.4975923
Autor:
Sandip De, Rainer Loesing, Rajesh Sathiyanarayanan, Rajan K. Pandey, H.G. Parks, Srini Raghavan, Shahab Siddiqui, Min Dai, Erdem Kaltalioglu
Publikováno v:
Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena. 35:012202
In this study, the authors investigate the impact of radical oxygen plasma on nitrided and annealed atomic layer deposited (ALD) SiO2 as a thick gate oxide (1.65–3 V) with a high-k/metal gate transistor. Time-dependent-dielectric-breakdown voltage,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d95ca8bc03f771863126f2b7f3e2794b
https://doi.org/10.1116/1.4974250
https://doi.org/10.1116/1.4974250
Publikováno v:
Microscopy and Microanalysis. 21:1087-1088
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7f8d7e0634f6efce88c529f5b5d16b66
https://doi.org/10.1017/s1431927615006224
https://doi.org/10.1017/s1431927615006224
Autor:
Shu-Jen Han, Aaron D. Franklin, Ageeth A. Bol, Wilfried Haensch, Zhihong Chen, George S. Tulevski, Rainer Loesing, Dechao Guo, Josephine B. Chang
Publikováno v:
2010 International Electron Devices Meeting.
One critical factor that determines the feasibility of employing carbon nanotubes as channel materials for post-silicon logic devices is the process compatibility to the current CMOS process flow. We show a wafer-scale integration scheme of carbon na
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cfde3a3f4e9257e80646887f8db6a7e4
https://doi.org/10.1109/iedm.2010.5703326
https://doi.org/10.1109/iedm.2010.5703326
Autor:
M. Hatzistergos, Christian Pacha, Haoren Zhuang, Melanie J. Sherony, Yong Meng Lee, T.J. Tang, S. Han, S. Samavedam, Jens Haetty, Sun-OO Kim, Martin Ostermayr, R. Divakaruni, V.-Y. Theon, Weipeng Li, Kenneth J. Stein, Michael P. Chudzik, Haizhou Yin, X. Chen, Richard Lindsay, J.-P. Han, M. Chowdhury, Jaeger Daniel, Naim Moumen, Dae-Gyu Park, Nam-Sung Kim, Kisang Kim, Manfred Eller, Dominic J. Schepis, Rainer Loesing, Mukesh Khare, J. Chen, K. von Arnim, An L. Steegen, Thomas S. Kanarsky, Vijay Narayanan, W. Yan, Klaus Schruefer
Publikováno v:
2009 International Symposium on VLSI Technology, Systems, and Applications.
This paper presents performance evaluation of high-κ/metal gate (HK/MG) process on an industry standard 45nm low power microprocessor built on bulk substrate. CMOS devices built with HK/MG demonstrate 50% improvement in NFET and 65% improvement in P
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::85726ae47609ee2928b18dfa8334b007
https://doi.org/10.1109/vtsa.2009.5159305
https://doi.org/10.1109/vtsa.2009.5159305
Autor:
Byeong Y. Kim, Christian Lavoie, Rainer Loesing, Ashima B. Chakravarti, Anita Madan, I. Popova, Jinghong Li, Thomas W. Dyer, Teresa L. Pinto, Zhijiong Luo, Yaocheng Liu, William K. Henson, K.K. Chan, Ahmet S. Ozcan, Nivo Rovedo, Ken Rim, Oleg Gluschenkov
Publikováno v:
2007 IEEE Symposium on VLSI Technology.
Current drive enhancement is demonstrated in sub-40 nm NFETs with strained silicon carbon (Si:C) source and drain using a novel solid-phase epitaxy (SPE) technique for the first time. The very simple process uses no recess etch or epi deposition step
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::da848c8ad09a66a95edc3673293379a3
https://doi.org/10.1109/vlsit.2007.4339720
https://doi.org/10.1109/vlsit.2007.4339720