Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Rafael Ramos-Lara"'
Publikováno v:
Applied Sciences, Vol 12, Iss 1, p 378 (2021)
This paper describes three different approaches for the implementation of an online signature verification system on a low-cost FPGA. The system is based on an algorithm, which operates on real numbers using the double-precision floating-point IEEE 7
Externí odkaz:
https://doaj.org/article/79570dd45e4845c6b529a06958cbf04e
Publikováno v:
IEEE Transactions on Power Electronics. 35:2222-2232
This paper describes the design, robustness analysis, and implementation of a zero average dynamics sliding mode control (ZAD–SMC) for a multiphase step-down converter. The ZAD–SMC operates at fixed switching frequency and allows to implement an
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::696e831148435c5c705f4feec7059ee8
https://doi.org/10.1109/tpel.2019.2927229
https://doi.org/10.1109/tpel.2019.2927229
Publikováno v:
Journal of Parallel and Distributed Computing. 112:20-34
This paper aims at presenting a Floating-Point Biometric Accelerator (FPBA) specially designed to speed-up processing kernels used in biometric algorithms. The FPBA was developed in order to facilitate its inclusion as part of an embedded system that
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bc388eb5667202bab46db50c5688faa5
https://doi.org/10.1016/j.jpdc.2017.09.010
https://doi.org/10.1016/j.jpdc.2017.09.010
Publikováno v:
Recercat. Dipósit de la Recerca de Catalunya
instname
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
instname
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
© 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting /republishing this material for advertising or promotional purposes, creating new
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::7b8aab87923f588e8e22840d8b85b57a
https://doi.org/10.1109/tpel.2017.2662327
https://doi.org/10.1109/tpel.2017.2662327
Publikováno v:
Ieee Transactions On Industrial Informatics
Repositori Institucional de la Universitat Rovira i Virgili
Universitat Rovira i virgili (URV)
Repositori Institucional de la Universitat Rovira i Virgili
Universitat Rovira i virgili (URV)
This paper describes the implementation on field-programmable gate arrays (FPGAs) of an embedded system for online signature verification. The recognition algorithm mainly consists of three stages. First, an initial preprocessing is applied on the ca
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a251d93994cc2b0af3452c8c6e4e4a70
https://doi.org/10.1109/tii.2013.2269031
https://doi.org/10.1109/tii.2013.2269031
Publikováno v:
Recercat. Dipósit de la Recerca de Catalunya
instname
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
instname
UPCommons. Portal del coneixement obert de la UPC
Universitat Politècnica de Catalunya (UPC)
Nowadays, biometrics is considered as a promising solution in the market of security and personal verification. Applications such as financial transactions, law enforcement or network management security are already benefitting from this technology.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::725eadcddb0a7ba34f8ea319f1075ea1
https://doi.org/10.1007/s11265-012-0683-5
https://doi.org/10.1007/s11265-012-0683-5
Publikováno v:
FPL
Biometric systems, characterized by their high confidential levels of security, are usually based on high-performance microprocessors implemented on personal computers. These advanced devices contain floating-point units able to carry out millions of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::71107783971cdb9dc37a17618df7c321
https://doi.org/10.1109/fpl.2009.5272430
https://doi.org/10.1109/fpl.2009.5272430