Zobrazeno 1 - 10
of 16
pro vyhledávání: '"Rafael B. Schvittz"'
Publikováno v:
2022 IEEE 23rd Latin American Test Symposium (LATS).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::44e484a971de3b83b22b9b87b5dd1e47
https://doi.org/10.1109/lats57337.2022.9936911
https://doi.org/10.1109/lats57337.2022.9936911
Autor:
Rafael N. M. Oliveira, Fabio G. R. G. da Silva, Ricardo Reis, Rafael B. Schvittz, Cristina Meinhardt
Publikováno v:
2022 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1124c896ed426ce5accb17a7d86c28b9
https://doi.org/10.1109/sbcci55532.2022.9893240
https://doi.org/10.1109/sbcci55532.2022.9893240
Autor:
Matheus F. Pontes, Ingrid F. V. Oliveira, Rafael B. Schvittz, Leomar S. Rosa, Paulo F. Butzen
Publikováno v:
2022 IEEE International Symposium on Circuits and Systems (ISCAS).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f3e8cd72bbdea12650f7fc640c81685d
https://doi.org/10.1109/iscas48785.2022.9937573
https://doi.org/10.1109/iscas48785.2022.9937573
Autor:
Ingrid F. V. Oliveira, Matheus F. Pontes, Rafael B. Schvittz, Leomar S. Rosa, Paulo F. Butzen, Rafael I. Soares
Publikováno v:
2022 IEEE International Symposium on Circuits and Systems (ISCAS).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1297b4f3aaffc9e9e5ea56a43da47385
https://doi.org/10.1109/iscas48785.2022.9938002
https://doi.org/10.1109/iscas48785.2022.9938002
Autor:
Laura Quevedo Jurgina, Matheus F. Pontes, Clayton R. Farias, Guilherme Manske, Rafael B. Schvittz, Paulo F. Butzen, Leomar Soares Rosa Júnior
Publikováno v:
Anais do XXXII Simpósio Brasileiro de Informática na Educação (SBIE 2021).
Este trabalho descreve a ferramenta CREsT, desenvolvida para dar suporte ao ensino de confiabilidade em circuitos digitais. A confiabilidade deve ser levada em consideração na arquitetura de circuitos e está presente nas discussões mais recentes
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::64260ac1319791b35cfc2e8b0b3b3b91
https://doi.org/10.5753/sbie.2021.218522
https://doi.org/10.5753/sbie.2021.218522
Autor:
Tiago R. Balen, Carlos J. Gonzalez, Ingrid F. V. Oliveira, Rafael B. Schvittz, Nemitala Added, Eduardo L. A. Macchione, Vitor A. P. Aguiar, Marcilei A. Guazzelli, Nilberto H. Medina, Paulo F. Butzen
Publikováno v:
2021 IEEE 22nd Latin American Test Symposium (LATS).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dfd049f50555441a3b96eb65ab60409b
https://doi.org/10.1109/lats53581.2021.9651736
https://doi.org/10.1109/lats53581.2021.9651736
Publikováno v:
ITC
New design methodologies are needed to improve the circuit robustness to deal with technology scaling issues. Traditional fault-tolerant approaches present severe overheads. Alternative solutions based on partial fault tolerance and fault avoidance a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::11ca2676d3b7b29e64f790b969a2a9d5
https://doi.org/10.1109/itc44778.2020.9325252
https://doi.org/10.1109/itc44778.2020.9325252
Autor:
Paulo F. Butzen, Rafael B. Schvittz, J.-L. Autran, Leomar S. da Rosa, Frédéric Wrobel, Y. Q. Aguiar
Publikováno v:
Microelectronics Reliability
Microelectronics Reliability, 2020, 114, ⟨10.1016/j.microrel.2020.113871⟩
Microelectronics Reliability, Elsevier, 2020, 114, ⟨10.1016/j.microrel.2020.113871⟩
Microelectronics Reliability, 2020, 114, ⟨10.1016/j.microrel.2020.113871⟩
Microelectronics Reliability, Elsevier, 2020, 114, ⟨10.1016/j.microrel.2020.113871⟩
International audience; This paper presents a discussion related to two different methods used to evaluate logic gate susceptibility considering Single Event Transient faults at the layout level. These methods can be adopted into radiation-hardening-
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::4fb1ecf2839be557604524a908ee72fa
Publikováno v:
IFIP Advances in Information and Communication Technology
27th IFIP/IEEE International Conference on Very Large Scale Integration-System on a Chip (VLSI-SoC)
27th IFIP/IEEE International Conference on Very Large Scale Integration-System on a Chip (VLSI-SoC), Oct 2019, Cusco, Peru. pp.69-88, ⟨10.1007/978-3-030-53273-4_4⟩
IFIP Advances in Information and Communication Technology ISBN: 9783030532727
VLSI-SoC (Selected Papers)
27th IFIP/IEEE International Conference on Very Large Scale Integration-System on a Chip (VLSI-SoC)
27th IFIP/IEEE International Conference on Very Large Scale Integration-System on a Chip (VLSI-SoC), Oct 2019, Cusco, Peru. pp.69-88, ⟨10.1007/978-3-030-53273-4_4⟩
IFIP Advances in Information and Communication Technology ISBN: 9783030532727
VLSI-SoC (Selected Papers)
International audience; Technology scaling increases the integrated circuits susceptibility to Single Event Effects. As a manner to mitigate soft errors, solutions incur significant performance and area penalties, especially when a design with fault-
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ec522b819d474726dceb7af17f61c6a4
https://hal.inria.fr/hal-03476616
https://hal.inria.fr/hal-03476616
Publikováno v:
VLSI-SoC
The circuit reliability in nanometer technologies has become an important aspect of circuit design. Techniques to improve reliability usually increase project costs. To avoid overdesign, techniques to estimate circuit reliability are commonly used. T
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8f5c7146c948da7910412b60937914a6
https://doi.org/10.1109/vlsi-soc.2019.8920385
https://doi.org/10.1109/vlsi-soc.2019.8920385