Zobrazeno 1 - 10
of 35
pro vyhledávání: '"R.Z. Makki"'
Publikováno v:
IEEE Transactions on Computers. 40:785-791
The authors present a test algorithm for finite state machines called branch testing. Based on branch testing, a design-for-test (DFT) method is proposed. Comparisons to other DFT methods show the method to be competitive relative to circuit overhead
Testing Embedded Memories: Is Bist The Ultimate Solution? Testing Of Embedded Memories-the Aggregate
Autor:
R.Z. Makki
Publikováno v:
Proceedings Seventh Asian Test Symposium (ATS'98) (Cat. No.98TB100259).
Publikováno v:
Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.
Publikováno v:
Proceedings. IEEE Energy and Information Technologies in the Southeast'.
A tool is presented for designing finite-state machines. The tool allows for several synthesis options which include: one-shot encoding; programmable logic arrays; and decoding and minimization. A common high-level description capability is provided
Publikováno v:
Proceedings. IEEE Energy and Information Technologies in the Southeast'.
The authors present a VLSI implementation of a control system used for automatic control of control rods in a typical nuclear power station. Fast, efficient, and reliable control over the control rods is achieved. The design is divided into two VLSI
Publikováno v:
[1988] Proceedings. The Twentieth Southeastern Symposium on System Theory.
A description is given of the testability features of a VLSI implementation of a high-performance display controller for diagnostic radiology. The design-for-test features cover 100% of the silicon area at a modest overhead. Boundary-scan, partitioni
Autor:
E. Saliba, R.Z. Makki
Publikováno v:
Conference Proceedings '88., IEEE Southeastcon.
A time-shared resource organization is established for boundary scan registers. Modules under test share the scan latches in the boundary scan which results in a reduction in test serialization and enhances the process of fault location. >
Autor:
Shyang-Tai Su, R.Z. Makki
Publikováno v:
VTS
The authors present a new SRAM test technique that can reduce the test complexity from O(n/sup 2/) to 5n for detecting pattern sensitive faults. A new design-for-test scheme is employed which makes possible the use of current monitoring techniques fo
Publikováno v:
Proceedings of 28th Southeastern Symposium on System Theory.
This paper describes a general purpose biomedical telemetry system consisting of an implantable VLSI chip and an RS232 compatible remote telemetry receiver. The implant supports a variety of programmable options to provide compatibility with a number
Publikováno v:
Proceedings Seventh Annual IEEE International ASIC Conference and Exhibit.
In this paper, we report the results of a physical experiment aimed at assessing a new test method for CMOS SRAMs. The test method involves a new and simple philosophy for testing: monitor the switching behavior of a circuit rather than just the outp