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pro vyhledávání: '"R.N. Master"'
Publikováno v:
IEEE Transactions on Electronics Packaging Manufacturing. 32:106-114
The advanced flip-chip-in-package (FCIP) process technology, using no-flow underfill material for high I/O density (over 3000 I/O) and fine-pitch (down to 150 mum) interconnect applications, presents challenges for flip chip processing because underf
Publikováno v:
IEEE Transactions on Electronics Packaging Manufacturing. 31:297-305
The advanced flip chip in package (FCIP) process using no-flow underfill material for high I/O density and fine-pitch interconnect applications presents challenges for an assembly process that must achieve high electrical interconnect yield and high
Publikováno v:
IEEE Transactions on Device and Materials Reliability. 4:86-91
A generalized plane strain condition is assumed for an edge interfacial crack between die passivation and underfill on an organic substrate flip chip package. C4 solder bumps are explicitly modeled. Temperature excursions are treated as loading condi
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Publikováno v:
2008 15th International Symposium on the Physical and Failure Analysis of Integrated Circuits.
This paper studied the factors of causing adhesion failure between lid and adhesive. Adhesive curing mechanism has been experimentally investigated in combination of surface behaviour analysis on lid by using FTIR and XPS. The results showed residue
Autor:
R.N. Master
Publikováno v:
2008 15th International Symposium on the Physical and Failure Analysis of Integrated Circuits.
As the demand for computing performance and density increases, the demand for packaging microprocessors is getting more complex. Computing speed and increased functionalities are achieved by reducing lithography features and increasing no. of transis
Publikováno v:
2008 11th Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems.
In flip-chip package, the mismatch of thermal expansion coefficients between the silicon die, copper heat spreader and packaging substrate induces concentrated stress field around the edges and corners of silicon die during assembly, testing and serv
Publikováno v:
2007 Proceedings 57th Electronic Components and Technology Conference.
The application of no-flow underfills for high IO density, fine-pitch, flip chip in package (FCIP) applications is analyzed. A number of commercially developed no flow underfills are evaluated. Process parameters for improved assembly yields depend s
Publikováno v:
2005 7th Electronic Packaging Technology Conference.
Voids in flip chip packaging of organic land grid array (OLGA) caused by the inclusion of air, other gases and moisture were studied and experiments were designed to understand the cause of void formation. Reactions among the solder mask, flux residu
Publikováno v:
4th Electronics Packaging Technology Conference, 2002..
With increasing applications of thin multi-layer flip chip packages with complex interweaving layout, the difficulties and ineffectiveness of fault isolation with current nondestructive techniques such as RTX (real time X-ray) and SAM (scanning acous