Zobrazeno 1 - 10
of 90
pro vyhledávání: '"R.F. Pinizzotto"'
Publikováno v:
IEEE Transactions on Electron Devices. 29:547-553
A composite polycide structure consisting of refractory metal silicide film on top of polysilicon has been considered as a replacement for polysilicon as a gate electrode and interconnect line in MOSFET integrated circuits. This paper presents fine-l
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::073e2c26feb2e80736e9d64b62021930
https://doi.org/10.1109/t-ed.1982.20741
https://doi.org/10.1109/t-ed.1982.20741
Publikováno v:
IEEE Transactions on Electron Devices. 29:389-394
By using a CW-laser-beam-induced lateral seeding technique, which is a zone-melting crystal-growth process, single-crystal silicon-on-oxide with {100} orientation has been obtained. To adopt this process for silicon-on-insulator (SOI) MOS transistor
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9b957da52f65d217132ed008a299c152
https://doi.org/10.1109/t-ed.1982.20713
https://doi.org/10.1109/t-ed.1982.20713
Publikováno v:
IEEE Journal of Solid-State Circuits. 17:177-183
A composite polycide structure consisting of refractory metal silicide film on top of polysilicon has been considered as a replacement for polysilicon as a gate electrode and interconnect line in MOSFET integrated circuits. This paper presents fine-l
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dd0901a3c4855dff720ecc7d05c9d472
https://doi.org/10.1109/jssc.1982.1051713
https://doi.org/10.1109/jssc.1982.1051713
Autor:
C.-E. Chen, D.W. Bellavance, Hisashi Shichijo, R.F. Pinizzotto, H.W. Lam, Pallab K. Chatterjee, Satwinder Malhi, Rajiv R. Shah
Publikováno v:
IEEE Electron Device Letters. 4:369-371
p-channel MOSFET's have been fabricated in LPCVD polysilicon. A 5000-A n+poly acts as the gate electrode on which a 500-A thermal oxide is grown to act as the gate insulator. Then a 1500-A LPCVD polysilicon layer is deposited at 620°C and is subsequ
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::22f6fb43b00e12f2744e08beb8eddd45
https://doi.org/10.1109/edl.1983.25767
https://doi.org/10.1109/edl.1983.25767
Publikováno v:
IEEE Electron Device Letters. 4:272-274
A static random access memory (SRAM) cell with cross-coupled stacked CMOS inverters is demonstrated for the first time. In this approach, CMOS inverters are fabricated with a laser recrystallized p-channel device stacked on top of and sharing the gat
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a22adacc2b547d4a156c45e83018081c
https://doi.org/10.1109/edl.1983.25730
https://doi.org/10.1109/edl.1983.25730
Publisher Summary This chapter addresses the application of silicon-on-insulator (SOI) structures to very large-scale integrated (VLSI) circuits based on micro-structures whose dimensions are in the neighborhood of one micron and less. This class of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4a9716bdf4b19bb0e09f9763acc8aa41
https://doi.org/10.1016/b978-0-12-234104-5.50007-x
https://doi.org/10.1016/b978-0-12-234104-5.50007-x
Publikováno v:
1982 International Electron Devices Meeting.
A CMOS process has been implemented on graphite strip heater recrystallized silicon substrates. The low field electron mobility of 660 cm2/V.sec and hole mobility of 220 cm2/V.sec is obtained. For a gate length of 5 µm and gate oxide thickness of 50
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b7227dedf1002ccb02cddde97eb6722c
https://doi.org/10.1109/iedm.1982.190319
https://doi.org/10.1109/iedm.1982.190319
Publikováno v:
1981 International Electron Devices Meeting.
A composite polycide structure consisting of coevaporated TiSi 2 film on top of polysilicon is studied as a replacement for polysilicon as gate electrode and interconnect line in very large scale integrated circuits. Coevaporated TiSi 2 polycide gate
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::03b763e070613356638866a360e5b03a
https://doi.org/10.1109/iedm.1981.189998
https://doi.org/10.1109/iedm.1981.189998
Publikováno v:
1982 International Electron Devices Meeting.
A novel SOI CMOS design has been explored. It utilizes an ultra thin near intrinsic substrate wherein no channel doping is introduced during processing. The enhancement operation is realized solely by proper adjustment of work function difference thr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::03b3f8fa92603b3402955e45439f5e41
https://doi.org/10.1109/iedm.1982.190225
https://doi.org/10.1109/iedm.1982.190225
Publikováno v:
1980 International Electron Devices Meeting.
By using a modified LOCOS oxidation process, a 1 µm thick layer of SiO 2 was grown on selected areas of a {100} silicon wafer such that the resulting oxide surface was level with the original silicon surface. A 0.5 µm thick LPCVD polysilicon layer
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dfdffd32921268c94f144d8086e25889
https://doi.org/10.1109/iedm.1980.189893
https://doi.org/10.1109/iedm.1980.189893