Zobrazeno 1 - 10
of 121
pro vyhledávání: '"R. Seshasayanan"'
Publikováno v:
Alexandria Engineering Journal, Vol 54, Iss 3, Pp 447-455 (2015)
Viterbi algorithm is the most popular algorithm used to decode the convolution code, but its computational complexity increases exponentially with the increasing constraint length due to the large number of Trellis transitions. However, high constrai
Externí odkaz:
https://doaj.org/article/fd8dae28a1dc456dafbb93283792387b
Publikováno v:
The Scientific World Journal, Vol 2014 (2014)
As the size of the images being captured increases, there is a need for a robust algorithm for image compression which satiates the bandwidth limitation of the transmitted channels and preserves the image resolution without considerable loss in the i
Externí odkaz:
https://doaj.org/article/84bf610b14e64b6dad2044b141ee705b
Publikováno v:
International Journal of System Assurance Engineering and Management. 14:829-835
Autor:
S M Balamurugan, R Seshasayanan
Publikováno v:
Transactions of the Institute of Measurement and Control. 43:3672-3685
Motion estimation and motion compensation techniques are effectively used for removing temporal redundancy between adjacent frames during video compression, but video quality will be degraded with the traditional pixel-based matching algorithms. To o
Publikováno v:
Asian Journal of Computer Science and Technology. 8:25-29
Logarithmic conversion is a significant portion of numerous digital signals processing system and other applications. The anti logarithmic transformation presented in this paper is able to support the anti logarithmic conversion of data with the numb
Publikováno v:
Computational Intelligence and Neuroscience, Vol 2020 (2020)
Computational Intelligence and Neuroscience
Computational Intelligence and Neuroscience
The present work visualizes the evolution of primitive digital circuits as a development problem. The development of the digital circuit is implemented similar to the development of a human embryo from a single cell to the complete organism. The cons
Publikováno v:
Cluster Computing. 22:12759-12766
As FPGAs and ASICs are widely used for floating point computationally intensive operations, a logarithmic converter focusing on reducing the computational complexity and easy to implement is presented in this paper. The logarithmic converter is a par
Autor:
R. Nirmaladevi, R. Seshasayanan
Publikováno v:
Cluster Computing. 22:10709-10716
The need for hard (3X) multiple generation in radix-8 booth encoding increases the complexity of partial product generation and the latency of the multiplier. The source of delay is primarily the propagation of carry signals. A variety of carry propa
Publikováno v:
Journal of Computational and Theoretical Nanoscience. 14:4326-4339
Autor:
R. Seshasayanan, S. V. Priya
Publikováno v:
Journal of Computational and Theoretical Nanoscience. 13:9090-9097