[Untitled]

Autor: E. C. Schanzenbach, R. R. Habra, D. J. Hathaway, S. J. Rothman

Publikováno v: The Journal of VLSI Signal Processing. 16:191-198

Recent advances in integrated circuit technology have imposed new requirements on the chip physical design process. At the same time that performance requirements are increasing, the effects of wiring on delay are becoming more significant. Larger ch

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::55ac0ba47a9ed19b550bd4d548132101
https://doi.org/10.1023/a:1007943124807

Circuit Placement, Chip Optimization, and Wire Routing for IBM IC Technology

Autor: D. J. Hathaway, R. R. Habra, E. C. Schanzenbach, S. J. Rothman

Publikováno v: High Performance Clock Distribution Networks ISBN: 9781468484427

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::e3764716c36224822b8e5b4fde9d89a4
https://doi.org/10.1007/978-1-4684-8440-3_7

On mismatches between incremental optimizers and instance perturbations in physical design tools.

Autor: Kahng, A.B., Mantik, S.

Publikováno v: IEEE/ACM International Conference on Computer Aided Design. ICCAD-2000. IEEE/ACM Digest of Technical Papers (Cat. No.00CH37140); 2000, p17-21, 5p

A pseudo-hierarchical methodology for high performance microprocessor design.

Autor: Bertolet, A., Carpenter, K., Carrig, K., Chu, A., Dean, A., Ferraiolo, F., Kenyon, S., Phan, D., Petrovick, J., Rodgers, G., Willmott, D., Bairley, T., Decker, T., Girardi, V., Lapid, Y., Murphy, M., Scott, P. A., Weiss, R.

Publikováno v: Proceedings of the 1997 International Symposium: Physical Design; Apr1997, p124-129, 6p

EDA in IBM: Past, Present, and Future.

Autor: Darringer, John, Davidson, Evan

Publikováno v: IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems; Dec2000, Vol. 19 Issue 12, p1476, 22p, 11 Black and White Photographs, 1 Diagram, 2 Charts