Zobrazeno 1 - 10
of 11
pro vyhledávání: '"R. J. P. Lander"'
Autor:
R. J. P. Lander, Youri Victorovitch Ponomarev, R. Loo, W.B. de Boer, M. Caymax, J. G. M. van Berkum
Publikováno v:
Journal of Applied Physics. 88:2016-2023
Sheet resistivity and Hall measurements have been performed on a series of p-type modulation-doped Si/Si1−xGex heterostructures. The structures were grown by a production-compatible atmospheric-pressure chemical-vapor deposition technique and all t
Autor:
Evan H. C. Parker, R J P Lander, Michael J. Kearney, P. J. Phillips, Terry E. Whall, A I Horrell
Publikováno v:
Semiconductor Science and Technology. 12:1064-1071
A detailed comparison is made between theory and experiment for the low-temperature mobility of holes in gated oxide, coherently strained Si/SiGe heterostructures. We conclude that the mobility is mainly limited by interface impurities, conventional
Autor:
K. Wortel, S. Menten, T. Naass, J.T.M. van Beek, K.L. Phan, Martijn Goossens, E. Stikvoort, R. J. P. Lander, C. van der Avoort, A. Falepin
Publikováno v:
Frequency References, Power Management for SoC, and Smart Wireless Interfaces ISBN: 9783319010793
This paper describes a frequency synthesizer based on a MEMS resonator. Uniquely, the piezo-resistive properties of silicon are exploited to read out the resonator, resulting in low impedance levels at resonance frequencies up to several 100 MHz. A 5
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5408ae980c15e60b3d2f97513f9ab93d
https://doi.org/10.1007/978-3-319-01080-9_2
https://doi.org/10.1007/978-3-319-01080-9_2
Autor:
K. Wortel, T. van Ansem, E. Stikvoort, C. van der Avoort, J. Sistermans, F. Swartjes, J.T.M. van Beek, Martijn Goossens, R. J. P. Lander, T. Naass, S. Menten, K.L. Phan, Sumy Jose, M. A. A. in't Zandt
Publikováno v:
2013 Transducers & Eurosensors XXVII: The 17th International Conference on Solid-State Sensors, Actuators and Microsystems (TRANSDUCERS & EUROSENSORS XXVII).
In this paper, we present a detailed description of a MEMS frequency synthesizer product, including the principle, processing, system architecture, and reliability and characterization results. The synthesizer is based on a MEMS piezoresistive dog-bo
Autor:
S. Biesemans, Blandine Duriez, Georgios Vellianitis, Stephan Brus, R. J. P. Lander, Bartlomiej Jan Pawlak, T. Merelle, T. Y. Hoffmann, Philippe Absil, A. De Keersgieter, A. Veloso, Rita Rooyackers, Nadine Collaert, Ray Duffy, M.J.H. van Dal, M. Jurczak, L Witters, Augusto Redolfi
Publikováno v:
Extended Abstracts of the 2009 International Conference on Solid State Devices and Materials.
Autor:
Morin Dehan, Stefaan Decoutere, R. J. P. Lander, Willy Sansen, Bertrand Parvais, Stefan Kubicek, Abdelkarim Mercha, Josine Loo, Stéphane Donnay, Nadine Collaert, Guido Groeseneken, V. Subramanian, P. Wambacq, Jonathan Borremans, Dimitri Linten, F. N. Cubaynes, M. Jurczak, J.C. Hooker
Publikováno v:
Scopus-Elsevier
Comparison of digital and analog Figures-of-Merit of FinFETs and planar bulk MOSFETs reveals an interesting trade-off in analog/RF design space. It is seen that FinFETs possess key advantages over bulk FETs for applications around 5 GHz where the per
Autor:
C.J.J. Dachs, Tom Schram, R. J. P. Lander, B. Kaczer, S. Biesemans, J.-L. Everaert, M. Demand, Zsolt Tokei, Werner Boullart, Johan Vertommen, Stephan Beckx, J.C. Hooker, Kirklen Henson, O. Richard, Hugo Bender, F. N. Cubaynes, B. Coenegrachts, M. Jurczak, W. Vandervorst, Monja Kaiser, Wim Deweerd
Publikováno v:
IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..
We demonstrate for the first time that nMOS devices with PVD TaN gate on 1.2 nm EOT SiON can be fabricated with high drive currents. On state currents of 1150 /spl mu/A//spl mu/m (I/sub off/ < 10 nA//spl mu/m) at 1.2 V and 810 /spl mu/A//spl mu/m (I/
Autor:
Stefan Kubicek, Richard Lindsay, F.N. Cubaynes, C.J.J. Dachs, Z.M. Rittersma, J.C. Hooker, Josine Loo, Gerben Doornbos, Kirklen Henson, R. J. P. Lander, Youri Victorovitch Ponomarev, R. Surdeanu
Publikováno v:
Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710).
A CMOS process is developed in a research environment for integration studies of sub-50 nm MOSFETs with high-k (HiK) dielectrics, metal gates (MG), ultra-shallow junctions with laser thermal annealing (LTA), raised source/drain (RSD) and novel device
Autor:
Fred Roozeboom, R. J. P. Lander, J.P. van Zijl, Y. de Tamminga, Martien Maas, J.C. Hooker, Robertus A. M. Wolters
Publikováno v:
32nd European Solid-State Device Research Conference.
The work function of a metal gate electrode has been adjusted by the incorporation of nitrogen at the metaldielectric interface. The nitrogen was introduced using solid state diffusion from an over-stoichiometric TiN1+X layer. RBS measurements demons
Publikováno v:
Extended Abstracts of the 2000 International Conference on Solid State Devices and Materials.