Zobrazeno 1 - 10
of 80
pro vyhledávání: '"R R Manikandan"'
Autor:
Vinod Menezes, R R Manikandan, Mahesh Mehendale, Raveesh Magod, Rajat Chauhan, Anantha P. Chandrakasan, Vipul Singhal
Publikováno v:
VLSI Design
Power management systems for wireless sensor nodes in industrial IoT applications need to operate seamlessly from multiple energy sources and efficiently manage power delivery to multiple load circuits. This paper presents a single chip integrated po
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c63ccd3859d4d2d3308e4598a7ef69a4
https://doi.org/10.1109/vlsid51830.2021.00034
https://doi.org/10.1109/vlsid51830.2021.00034
Publikováno v:
VLSI Design
An ultra-low energy KHz timer/oscillator circuit suitable for heavily duty cycled systems is presented. The proposed oscillator design utilizes a 3-stage ring topology made of CMOS Schmitt trigger delay cells biased with sub-nA currents. To extract a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1911caf9af441d4bbb27e82cb97334a3
https://doi.org/10.1109/vlsid.2018.57
https://doi.org/10.1109/vlsid.2018.57
Autor:
R. R. Manikandan, Bharadwaj Amrutur
Publikováno v:
Microelectronics Journal. 46:422-430
The charge-pump (CP) mismatch current is a dominant source of static phase error and reference spur in the nano-meter CMOS PLL implementations due to its worsened channel length modulation effect. This paper presents a charge-pump (CP) mismatch curre
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::29cc157b2047dd5a30e78c080475a19e
https://doi.org/10.1016/j.mejo.2015.03.004
https://doi.org/10.1016/j.mejo.2015.03.004
Publikováno v:
VLSI Design
A switchable number of turns, symmetric, parallel stacked, variable width and spacing inductor structure with performance optimized for multi-band operation and an area efficient multi-band voltage controlled oscillator circuit (VCO) are presented. T
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::fb8547bc848907c6c75650a217303f2a
http://eprints.iisc.ac.in/57331/1/Int_Con_VLSI_Des_253_2017.pdf
http://eprints.iisc.ac.in/57331/1/Int_Con_VLSI_Des_253_2017.pdf
Autor:
Bharadwaj Amrutur, R. R. Manikandan
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 60:852-856
In this brief, the substrate noise effects of a pulsed clocking scheme on the output spur level, the phase noise, and the peak-to-peak (Pk-Pk) deterministic period jitter of an integer-N charge-pump phase-locked loop (PLL) are demonstrated experiment
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::569ce4327f1d5d9e6b1565b3f80cd914
https://doi.org/10.1109/tcsii.2013.2281942
https://doi.org/10.1109/tcsii.2013.2281942
Publikováno v:
IndraStra Global.
A logic gate-based digital frequency multiplication technique for low-power frequency synthesis is presented. The proposed digital edge combining approach offers broadband operation with low-power and low-area advantages and is a promising candidate
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::692df00febc566f6ff052a7d6e42d695
https://igi.indrastra.com/items/show/186413
https://igi.indrastra.com/items/show/186413
Publikováno v:
2014 IEEE International Microwave and RF Conference (IMaRC).
The on-chip planar spiral inductors having variable width (W) and spacing (S) across their turns are known to exhibit higher quality factors (Q). In this paper, we present an efficient parameterized cell (pcell) design in cadence using SKILL scripts
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::425964ad112dfd67437b3b31cf729bcf
https://doi.org/10.1109/imarc.2014.7039049
https://doi.org/10.1109/imarc.2014.7039049
Publikováno v:
VDAT
Layout optimized planar spiral inductors using variable width (W) and spacing (S) across their turns are known to exhibit higher quality factors (Q). In this paper, we explore the performance improvement of 3-dimensional, series-stacked, parallel-sta
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e83c6978999e9805223f1020413cb740
https://doi.org/10.1109/isvdat.2014.6881053
https://doi.org/10.1109/isvdat.2014.6881053
Autor:
Manikandan R; Department of Oral & Maxillofacial Surgery, Meenakshi Cleft and Craniofacial Center, Meenakshi Ammal Dental College & Hospital, Maduravoyal, Chennai, 600095 India., Anantanarayan P; Department of Oral & Maxillofacial Surgery, Meenakshi Cleft and Craniofacial Center, Meenakshi Ammal Dental College & Hospital, Maduravoyal, Chennai, 600095 India., Kumar DN; Department of Oral & Maxillofacial Surgery, Meenakshi Cleft and Craniofacial Center, Meenakshi Ammal Dental College & Hospital, Maduravoyal, Chennai, 600095 India., Ponvel K; Department of Oral & Maxillofacial Surgery, Meenakshi Cleft and Craniofacial Center, Meenakshi Ammal Dental College & Hospital, Maduravoyal, Chennai, 600095 India.
Publikováno v:
Journal of maxillofacial and oral surgery [J Maxillofac Oral Surg] 2024 Apr; Vol. 23 (2), pp. 416-423. Date of Electronic Publication: 2023 Dec 11.
Autor:
Prashanth KA; Department of Nuclear Medicine, MIOT International Hospital, Chennai, India. dr.arunprashanth@gmail.com., Jain D; Department of Lab Services, MIOT International Hospital, Chennai, India., Manikandan R; Department of Urology, MIOT International Hospital, Chennai, India., Kalyan S; Department of Medical Oncology, MIOT International Hospital, Chennai, India., Velayutham V; Department of Hepato-Pancreato-Biliary Centre for Surgery and Transplantation, MIOT International Hospital, Chennai, India., Surendran R; Department of Hepato-Pancreato-Biliary Centre for Surgery and Transplantation, MIOT International Hospital, Chennai, India.
Publikováno v:
European journal of hybrid imaging [Eur J Hybrid Imaging] 2023 Dec 01; Vol. 7 (1), pp. 26. Date of Electronic Publication: 2023 Dec 01.