Zobrazeno 1 - 10
of 76
pro vyhledávání: '"Qingdong Yao"'
Publikováno v:
Nanoscale; 8/28/2024, Vol. 16 Issue 32, p15009-15032, 24p
Publikováno v:
Parallel Computing. 39:461-474
With the proliferation of multi-processor core systems, parallel programming imposes a difficult challenge where current solutions are far from being considered efficient. In order to alleviate the difficulty of parallel programming, we propose a sch
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::17ced78682b26f43e8cd477a88510505
https://doi.org/10.1016/j.parco.2013.04.008
https://doi.org/10.1016/j.parco.2013.04.008
Publikováno v:
Computers & Electrical Engineering. 38:785-800
Recently there is a trend to broaden the usage of lower-power embedded media processor core to build the future high-end computing machine or the supercomputer. However the embedded solution also faces the operating system (OS) design challenge which
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::efe6133375e912091fd05e6b8a3c59e5
https://doi.org/10.1016/j.compeleceng.2011.09.009
https://doi.org/10.1016/j.compeleceng.2011.09.009
Publikováno v:
International Journal of Electronics. 97:1241-1262
In this article, we present a highly scalable, flexible hardware-based network-on-chip (NoC) emulation framework, through which NoCs built upon various types of network topologies, routing algorithms, switching protocols and flow control schemes can
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9b30119f629e9bfde30b218646f7639d
https://doi.org/10.1080/00207217.2010.512017
https://doi.org/10.1080/00207217.2010.512017
Publikováno v:
Computers & Electrical Engineering. 35:817-836
Many on-chip network circuit and architecture techniques are incompatible with modern design flows, making them unsuitable for use in systems-on-chip. This paper presents a networks-on-chip (NoC) architecture design space exploration method for multi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3fd7b4d72d476c147d881b9fb449d02b
https://doi.org/10.1016/j.compeleceng.2008.11.027
https://doi.org/10.1016/j.compeleceng.2008.11.027
Publikováno v:
Journal of Zhejiang University-SCIENCE A. 10:1067-1074
This study presents a new method of 4-pipelined high-performance split multiply-accumulator (MAC) architecture, which is capable of supporting multiple precisions developed for media processors. To speed up the design further, a novel partial product
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bd4e5bf778a759da6aa37e8af9fdc20f
https://doi.org/10.1631/jzus.a0820566
https://doi.org/10.1631/jzus.a0820566
Publikováno v:
Journal of Electronics (China). 26:244-251
This paper proposes an object oriented model scheduling for parallel computing in media MultiProcessors System on Chip (MPSoC). Firstly, the Coarse Grain Data Flow Graph (CGDFG) parallel programming model is used in this approach. Secondly, this appr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3275da0a5e4a454aa1db96d3694fdf68
https://doi.org/10.1007/s11767-007-0173-2
https://doi.org/10.1007/s11767-007-0173-2
Publikováno v:
Journal of Zhejiang University-SCIENCE A. 9:1621-1630
In this paper, multiresolution critical-point filters (CPFs) are employed to image matching for frame rate up-conversion (FRUC). By CPF matching, the dense motion field can be obtained for representing object motions accurately. However, the elastic
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c6a1bc361dcad0b6c403686d4a014aa7
https://doi.org/10.1631/jzus.a0820200
https://doi.org/10.1631/jzus.a0820200
Publikováno v:
Journal of Electronics (China). 22:640-649
This paper presents a design method of ByPassing Unit(BPU) in 32-bit Digital Signal Processor(DSP)-MD32. MD32 is realized in 0.18 µm technology, 1.8V and 200 MHz working clock. It focuses on the Reduced Instruction Set Computer(RISC) architecture an
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4666d7c988a3203113462baa36c7c0bb
https://doi.org/10.1007/bf02687845
https://doi.org/10.1007/bf02687845
Publikováno v:
IEEE Transactions on Consumer Electronics. 50:1244-1249
This paper proposes general software optimization techniques for embedded systems based on processors, which mainly include general optimization methods in high language and software and hardware co-optimization in assembly language. Then these techn
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::07db2c6df0e58b7db22d47a30556a316
https://doi.org/10.1109/tce.2004.1362526
https://doi.org/10.1109/tce.2004.1362526