Zobrazeno 1 - 10
of 48
pro vyhledávání: '"Q.P. Herr"'
Autor:
Q.P. Herr, Mark W. Johnson
Publikováno v:
IEEE Transactions on Appiled Superconductivity. 13:531-534
Noise-induced bit error rate (BER) is an important design constraint for RSFQ circuits. No method, however, has been reported to calculate the BER of real, multi-junction RSFQ gates. We report such a method that requires only the operating margins an
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0d727d03f302755b01c25b4de9a5e4af
https://doi.org/10.1109/tasc.2003.813926
https://doi.org/10.1109/tasc.2003.813926
Publikováno v:
IEEE Transactions on Appiled Superconductivity. 13:463-466
We recently reported communication up to 60 Gb/s between digital superconductor chips mounted on a passive carrier, using a novel driver circuit that produces a double-flux-quantum pulse. Here, we answer various practical questions pertaining to chip
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2bc0a15f307314a4959316bc01d0649d
https://doi.org/10.1109/tasc.2003.813901
https://doi.org/10.1109/tasc.2003.813901
Autor:
Q.P. Herr, A.H. Silver
Publikováno v:
IEEE Transactions on Appiled Superconductivity. 11:333-336
Compared with semiconductors, SFQ logic is very fast and dissipates extremely low power. But it does not approach the theoretical power dissipation associated with an SFQ switching event and single gate speed in complex circuits. For large circuits a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0da61624a28241069aa49552ccc5dd63
https://doi.org/10.1109/77.919350
https://doi.org/10.1109/77.919350
Autor:
M.W. Johnson, Q.P. Herr
Publikováno v:
IEEE Transactions on Appiled Superconductivity. 11:1078-1081
Yield optimization remains the primary device-level design task in digital superconductor electronics. We discuss yield-optimization in the context of our particular software implementation, Malt2, which interfaces to the circuit simulator Spice. Thi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::22d485bd24a52a96d05dd4e072ac6b93
https://doi.org/10.1109/77.919534
https://doi.org/10.1109/77.919534
Publikováno v:
IEEE Transactions on Appiled Superconductivity. 9:4341-4344
Circuit parameter variations resulting from the fabrication process affect the timing parameters of rapid single flux quantum (RSFQ) digital circuits. This determines the maximum clock rate and the yield of the circuit. It is generally believed that
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3fa8557aa6c2842c7ec9b5f51961e26e
https://doi.org/10.1109/77.783986
https://doi.org/10.1109/77.783986
Publikováno v:
IEEE Transactions on Appiled Superconductivity. 9:3594-3597
We measured the bit-error rate (BER) of an RS latch, a clocked SFQ circuit. A digital error-detection circuit was used to detect BER in the range unity to 10/sup -13/; below 10/sup -7/, the circuit was operated with a 12 GHz on-chip clock. BER was me
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f4ea8ab84502ee0f9914615dd8a79c2a
https://doi.org/10.1109/77.783807
https://doi.org/10.1109/77.783807
Publikováno v:
IEEE Transactions on Appiled Superconductivity. 9:3322-3325
Speed, integration scale, and production cost of digital electronics are all constrained by circuit yield. This is true in any technology, In Josephson circuits, parameter variations figure prominently into the yield equation. Extensive statistical d
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d4b033a2435f9d26429bdf735fa9647b
https://doi.org/10.1109/77.783740
https://doi.org/10.1109/77.783740
Publikováno v:
IEEE Transactions on Appiled Superconductivity. 9:18-38
The realization of large integrated circuits depends upon the application of computer-aided design (CAD) tools. This paper summarizes the results of a survey of CAD tools targeting superconducting digital electronics. Five categories of tools: circui
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4e399ed76f6bbe9191dd9fd83107f6c1
https://doi.org/10.1109/77.763251
https://doi.org/10.1109/77.763251
Publikováno v:
IEEE Transactions on Appiled Superconductivity. 9:4591-4606
Rapid single flux quantum (RSFQ) digital circuits have reached the level of medium- to large-scale of integration. At this level, existing design methodologies, developed specifically for RSFQ circuits, have become computationally inefficient. Applyi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2f471aabaf559af0af56abe5fc664a49
https://doi.org/10.1109/77.791915
https://doi.org/10.1109/77.791915
Publikováno v:
IEEE Transactions on Appiled Superconductivity. 7:2975-2978
We have developed a high speed test scheme for RSFQ circuits, in order to measure the maximum clock frequency of a four-bit RSFQ decimation digital filter (simulated to be 11 GHz). Our high speed test requires only a low speed interface and standard
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0b1244c576234b12983c58e183e1020a
https://doi.org/10.1109/77.621942
https://doi.org/10.1109/77.621942