Zobrazeno 1 - 10
of 18
pro vyhledávání: '"Purnima Sethi"'
Publikováno v:
Applied Sciences, Vol 8, Iss 7, p 1142 (2018)
Fiber to chip coupling is a critical aspect of any integrated photonic circuit. In terms of ease of fabrication as well as wafer-scale testability, surface grating couplers are by far the most preferred scheme of the coupling to integrated circuits.
Externí odkaz:
https://doaj.org/article/fb6bc3747d2f43a7b49e216e94d44e49
Autor:
Shankar Kumar Selvaraja, Purnima Sethi
Publikováno v:
2019 Workshop on Recent Advances in Photonics (WRAP).
We present a compact taper-based scheme for a wire-to-slot waveguide coupler in Silicon-on-Insulator platform. The phase matching between a wire and slot mode is achieved using a ~17.5 µm compact fabrication-tolerant multimode interference-based tap
Autor:
Shankar Kumar Selvaraja, Purnima Sethi
We experimentally demonstrate a broadband, fabrication tolerant, CMOS compatible compact silicon waveguide taper (34.2 um) in silicon-on-insulator wire waveguides. The taper works on multi-mode interference along the length of the taper. A single tap
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::8a28b76e12810118e039c732ce40808d
Autor:
Purnima Sethi, Shankar Kumar Selvaraja
Publikováno v:
Emerging Waveguide Technology
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::b5f6bf763b388083ca89ad3b899fd386
https://doi.org/10.5772/intechopen.77150
https://doi.org/10.5772/intechopen.77150
Publikováno v:
Applied Sciences, Vol 8, Iss 7, p 1142 (2018)
Applied Sciences
Volume 8
Issue 7
Applied Sciences
Volume 8
Issue 7
Fiber to chip coupling is a critical aspect of any integrated photonic circuit. In terms of ease of fabrication as well as wafer-scale testability, surface grating couplers are by far the most preferred scheme of the coupling to integrated circuits.
Publikováno v:
Integrated Optics: Devices, Materials, and Technologies XXII.
We demonstrate a compact efficient waveguide taper in Silicon Nitride platform. The proposed taper provides a coupling-efficiency of 95p at a length of 19.5 μm in comparison to the standard linear taper of length 50 μm that connects a 10 μm wide w
A novel design of large bandwidth, fabrication tolerant, CMOS-compatible compact tapers (15 mu m) have been proposed and experimentally demonstrated in silicon-oninsulator. The proposed taper along with linear grating couplers for spot-size conversio
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d3ce97abdbc24b9f3d64581ce4e41edd
Autor:
Sukhdev Roy, Purnima Sethi
Publikováno v:
IEEE Journal of Selected Topics in Quantum Electronics. 20:118-125
We present designs of all-optical SR, clocked-SR, D and T flip-flops, simultaneous single-bit comparator-decoder and reconfigurable logic unit based on all-optical switching by two-photon absorption induced free-carrier injection in silicon 2 × 2 ad
Autor:
Sukhdev Roy, Purnima Sethi
Publikováno v:
Journal of Lightwave Technology. 32:2173-2180
We present a theoretical model to analyze all-optical switching by two-photon absorption induced free-carrier injection in silicon 2 × 2 add-drop microring resonators. The theoretical simulations are in good agreement with experimental results. The
Autor:
Purnima Sethi, Shankar Kumar Selvaraja
Publikováno v:
13th International Conference on Fiber Optics and Photonics.
Various configurations of ring resonator based delay lines have been studied analytically. A ring inside ring configuration is proposed to achieve a delay of ~300 ps (ER ~ 90%) with a device footprint ~0.03 mm2.