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pro vyhledávání: '"Pull-up resistor"'
Akademický článek
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Autor:
Niklas Lotze, Yiannos Manoli
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 64:2920-2933
Supply-voltage reduction in digital circuits beyond the minimum energy per operation point is advantageous for supply-voltage-constrained applications and can help to considerably reduce standby power consumption. Schmitt trigger (ST) logic allows fo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::82139e254a469464f3007857eeaaaf9b
https://doi.org/10.1109/tcsi.2017.2705053
https://doi.org/10.1109/tcsi.2017.2705053
Publikováno v:
International Journal of Signal Processing, Image Processing and Pattern Recognition. 10:31-42
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::644ec9c27e0334c0f4e09851bb796d4e
https://doi.org/10.14257/ijsip.2017.10.9.04
https://doi.org/10.14257/ijsip.2017.10.9.04
Publikováno v:
Microelectronics Journal. 63:35-40
This paper presents a low power bandgap reference (BGR) with 573 mV average output voltage and 0.95-V minimum supply voltage. Here, the resistor ratio of two types of resistors that have opposite temperature coefficient (TC) realizes a second-order c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a6e9a8662f275066020be096efd30fea
https://doi.org/10.1016/j.mejo.2017.02.016
https://doi.org/10.1016/j.mejo.2017.02.016
Publikováno v:
Organic Electronics. 41:73-78
To realize a flexible and ultra-low power non-volatile resistive random access memory (NVRRAM), we propose a 3 × 3 resistive memory array comprised of crossbar memristors and a pull-up resistor connected to each column bar (1R-CM). This architecture
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b786fff53c5bb968b9a596a34141111b
https://doi.org/10.1016/j.orgel.2016.12.007
https://doi.org/10.1016/j.orgel.2016.12.007
Publikováno v:
2019 IEEE 4th International Future Energy Electronics Conference (IFEEC).
Targeting on high switching frequency gallium nitride (GaN) dc-dc buck converter, this paper presents a 10MHz switching frequency gate driver IC for GaN based synchronous buck converter with 12V maximum input voltage. The proposed bootstrap circuit p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::599afc73a5640fb30e284a065054838a
https://doi.org/10.1109/ifeec47410.2019.9015025
https://doi.org/10.1109/ifeec47410.2019.9015025
Autor:
Olaf Spinczyk, Daniel Friesel
Publikováno v:
IPSN
The Inter-Integrated Circuit (I2C) bus is frequently used to connect sensors and actuators to cyber-physical systems. It is designed around always-on pull-up resistors, which transform valuable electric energy into heat whenever a 0-signal is sent or
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7f9901ed5211410ffa52c1f32916c716
https://doi.org/10.1145/3302506.3312606
https://doi.org/10.1145/3302506.3312606
Publikováno v:
IEEE Transactions on Industrial Electronics. 63:5437-5441
This paper provides a characterizationr analysis for the voltage balance of modular cascaded converter in a medium-voltage direct-current distribution grid. Specifically, voltage stability and traditional auxiliary resistor solution are analyzed from
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d1d8e794ebd48368671ef0ca49fbb95e
https://doi.org/10.1109/tie.2016.2586755
https://doi.org/10.1109/tie.2016.2586755
Autor:
Shelly Garg, Vandana Niranjan
Publikováno v:
Electrical and Electronics Engineering: An International Journal. 5:21-36
There are several techniques to realize adiabatic logic but most of them require compliment forms. In this work, a new adiabatic logic technique has been proposed which is capable of working with a single time varying supply voltage. The most attract
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::95fac3dbfd0704934c88d4796e5e8da3
https://doi.org/10.14810/elelij.2016.5102
https://doi.org/10.14810/elelij.2016.5102
Autor:
Shoaib Shokuhi, Ali Hosseini
Publikováno v:
International Journal of Image, Graphics and Signal Processing. 8:45-52
In this article, power optimization is investigated in Configurable Logic Block (CLB) of Field Programmable Gate Array (FPGA) for 65nm technology via controlling Virtual Ground Voltage (Vssv) state that follows Power-Gated standard. Initially differe
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::592c596f2282cf3b0401587bf4c028df
https://doi.org/10.5815/ijigsp.2016.02.06
https://doi.org/10.5815/ijigsp.2016.02.06