Zobrazeno 1 - 4
of 4
pro vyhledávání: '"Prototypage matériel"'
Publikováno v:
European Geosciences Union General Assembly 2014
European Geosciences Union General Assembly 2014, Oct 2017, Saint-Jean-de-Monts, France. 2017
European Geosciences Union General Assembly 2014, Oct 2017, Saint-Jean-de-Monts, France. 2017
The Résif-CLB project calls for the installation of ~150 additional permanent broadband stations in metropolitan France by 2020, a massive undertaking that can only be achieved after defining and validating a standard station model that can be easil
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::cf05ff1ec424e140af74082c8cde3402
https://hal.archives-ouvertes.fr/hal-02271722
https://hal.archives-ouvertes.fr/hal-02271722
Publikováno v:
European Geosciences Union General Assembly 2014
European Geosciences Union General Assembly 2014, Apr 2014, Vienne, Austria. 2014
European Geosciences Union General Assembly 2014, Apr 2014, Vienne, Austria. 2014
In the framework of the Résif (French Seismological and Geodetic Network) project, we plan to install more than one hundred new permanent broadband stations in metropolitan France within the next 6 years. Whenever possible, the sensors will be insta
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::0706c93d3267217e0594694e20a424e8
https://hal.science/hal-02271689
https://hal.science/hal-02271689
Autor:
Blampey, A.
Ce travail de thèse introduit un nouveau concept dans la vérification des circuits au niveau RTL : l'interopérabilité entre simulateurs HDL, émulateurs matériel et plateformes de prototypage. Cela permet de bénéficier, à la fois de l'excelle
Externí odkaz:
http://tel.archives-ouvertes.fr/tel-00163987
http://tel.archives-ouvertes.fr/docs/00/16/39/87/PDF/iep_0239.pdf
http://tel.archives-ouvertes.fr/docs/00/16/39/87/PDF/iep_0239.pdf
Autor:
Blampey, A.
Publikováno v:
Micro et nanotechnologies/Microélectronique. Institut National Polytechnique de Grenoble-INPG, 2006. Français
This thesis defines a new concept in RTL verification : interoperability between HDL simulators, hardware emulators and hardware prototyping platforms. The main purpose is to benefit from both good speed of hardware prototyping platforms and debug ca
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::25c84da8bc3a26029ef52583c9e6ded7
https://tel.archives-ouvertes.fr/tel-00163987/file/iep_0239.pdf
https://tel.archives-ouvertes.fr/tel-00163987/file/iep_0239.pdf