Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Prodromou, Andreas"'
This work proposes a competitive scheduling approach, designed to scale to large heterogeneous multicore systems. This scheduler overcomes the challenges of (1) the high computation overhead of near-optimal schedulers, and (2) the error introduced by
Externí odkaz:
http://arxiv.org/abs/2109.00665
Publikováno v:
In Composite Structures 2011 93(4):1290-1299
Akademický článek
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An online and real-time fault detection and localization mechanism for network-on-chip architectures
Autor:
Chrysanthou, Kypros, Englezakis, Panayiotis, Prodromou, Andreas, Panteli, Andreas, Nicopoulos, Chrysostomos A., Sazeides, Yiannakis, Dimitrakopoulos, Giorgos N.
Publikováno v:
ACM Transactions on Architecture and Code Optimization
ACM Trans.Archit.Code Optim.
ACM Trans.Archit.Code Optim.
Networks-on-Chip (NoC) are becoming increasingly susceptible to emerging reliability threats. The need to detect and localize the occurrence of faults at runtime is steadily becoming imperative. In this work, we propose NoCAlert , a comprehensive onl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ca63b5274b217349c985075f5d53f83e
http://gnosis.library.ucy.ac.cy/handle/7/43191
http://gnosis.library.ucy.ac.cy/handle/7/43191
Publikováno v:
Proceedings-2012 IEEE/ACM 45th International Symposium on Microarchitecture, MICRO 2012
2012 IEEE/ACM 45th International Symposium on Microarchitecture, MICRO 2012
MICRO
2012 IEEE/ACM 45th International Symposium on Microarchitecture, MICRO 2012
MICRO
The widespread proliferation of the Chip Multi-Processor (CMP) paradigm has cemented the criticality of the on-chip interconnection fabric. The Network-on-Chip (NoC) is becoming increasingly susceptible to emerging reliability threats. As technology
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::2f1523d7b26a5c0c87d4365ff73669c9
http://gnosis.library.ucy.ac.cy/handle/7/54888
http://gnosis.library.ucy.ac.cy/handle/7/54888
Autor:
Milojevic, Dragomir, Idgunji, Sachin, Jevdjic, Djordje, Ozer, Emre, Lotfi-Kamran, Pejman, Panteli, Andreas, Prodromou, Andreas, Nicopoulos, Chrysostomos, Hardy, Damien, Falsari, Babak, Sazeides, Yiannakis
Publikováno v:
2012 IEEE 30th International Conference on Computer Design (ICCD); 1/ 1/2012, p175-182, 8p
Autor:
Milojevic, D., Idgunji, S., Jevdjic, D., Ozer, E., Lotfi-Kamran, P., Panteli, Andreas, Prodromou, Andreas, Nicopoulos, Chrysostomos A., Hardy, D., Falsari, B., Sazeides, Yiannakis
Publikováno v:
Proceedings-IEEE International Conference on Computer Design: VLSI in Computers and Processors
ICCD
2012 IEEE 30th International Conference on Computer Design, ICCD 2012
ICCD
2012 IEEE 30th International Conference on Computer Design, ICCD 2012
We propose a power-efficient many-core server-on-chip system with 3D-stacked Wide I/O DRAM targeting cloud workloads in datacenters. The integration of 3D-stacked Wide I/O DRAM on top of a logic die increases available memory bandwidth by using dense
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::ffeccd18dffd138ce7afd12e51143c4d
https://infoscience.epfl.ch/record/183748
https://infoscience.epfl.ch/record/183748
Conference
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