Zobrazeno 1 - 10
of 1 208
pro vyhledávání: '"Process variations"'
Publikováno v:
Journal of Advanced Joining Processes, Vol 9, Iss , Pp 100227- (2024)
Semitubular self-piercing riveting is an important and well-established mechanical joining process. A new approach, which involves the use of high strain hardening rivet materials, has the potential advantage of increasing resource efficiency in rive
Externí odkaz:
https://doaj.org/article/d7f0a0cf94cf48868a7f599aa9fa4103
Autor:
Matthew Spear, Joshua E. Kim, Christopher H. Bennett, Sapan Agarwal, Matthew J. Marinella, T. Patrick Xiao
Publikováno v:
IEEE Journal on Exploratory Solid-State Computational Devices and Circuits, Vol 9, Iss 2, Pp 176-184 (2023)
The analog-to-digital converter (ADC) is not only a key component in analog in-memory computing (IMC) accelerators but also a bottleneck for the efficiency and accuracy of these systems. While the tradeoffs between power consumption, latency, and are
Externí odkaz:
https://doaj.org/article/2fea95d8692c448d91928b5cba991cb8
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 11, Pp 303-310 (2023)
Process variations (PV), including global variation (GV) and local variation (LV), have become one of the major issues in advanced technologies, which is crucial for circuit performance and yield. However, developing a mature and physics-based model
Externí odkaz:
https://doaj.org/article/f521b6838a3c44e29d9bc4875b3c1969
Akademický článek
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Autor:
Sherif Sharroush
Publikováno v:
Port Said Engineering Research Journal, Vol 26, Iss 3, Pp 93-109 (2022)
There is no doubt that complementary metal-oxide semiconductor (CMOS) circuits with wide fan-in suffers from degraded performance. In this paper, a circuit that depends on charge accumulation is proposed as an alternative to conventional CMOS design.
Externí odkaz:
https://doaj.org/article/950865f3078047f490a41a96057c3739
Publikováno v:
IEEE Access, Vol 10, Pp 7533-7553 (2022)
A novel modeling methodology is developed for interconnect parasitic capacitances in rule-based extraction tools. Traditional rule-based extraction tools rely on pattern matching operations to match every interconnect structure with corresponding pre
Externí odkaz:
https://doaj.org/article/59cfb70537c44a74ad245559be7a02d7
Publikováno v:
IEEE Access, Vol 10, Pp 64161-64171 (2022)
Soft errors, aging effects and process variations have become the three most critical reliability issues for nanoscale complementary metal oxide semiconductor (CMOS) circuits. In this paper, the effects of bias temperature instability (BTI) and proce
Externí odkaz:
https://doaj.org/article/a360af87fb014ba2bbee0dbc2dc3b367
Akademický článek
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Publikováno v:
Sensors, Vol 23, Iss 11, p 5095 (2023)
The need for power-efficient devices, such as smart sensor nodes, mobile devices, and portable digital gadgets, is markedly increasing and these devices are becoming commonly used in daily life. These devices continue to demand an energy-efficient ca
Externí odkaz:
https://doaj.org/article/2e8dec43e1274aea95f1026b5cbe29ea
Publikováno v:
IEEE Access, Vol 9, Pp 114120-114134 (2021)
In nano-scale CMOS technology, circuit reliability is a growing concern for complicated digital circuits due to manufacturing process variation and aging effects. In this paper, a statistical circuit optimization framework is presented to analyze and
Externí odkaz:
https://doaj.org/article/ecd619139f194e71a379548ae5664fe8