Zobrazeno 1 - 10
of 54
pro vyhledávání: '"Proactor pattern"'
Publikováno v:
Sensors & Transducers, Vol 173, Iss 6, Pp 189-196 (2014)
The Proactor-based server, which effectively encapsulates the asynchronous mechanisms provided by an operating system, can provide a high performance of concurrency. A queuing network model of the server is presented. And based on the model, an algor
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doajarticles::f6f2d1e7395517b0e3b2d4ac3073fbc5
http://www.sensorsportal.com/HTML/DIGEST/june_2014/Vol_173/P_2166.pdf
http://www.sensorsportal.com/HTML/DIGEST/june_2014/Vol_173/P_2166.pdf
Publikováno v:
IEICE Transactions on Electronics. :1669-1679
SUMMARY This paper presents a low-power FPGA based on mixed synchronous/asynchronous design. The proposed FPGA consists of several sections which consist of logic blocks, and each section can be used as either a synchronous circuit or an asynchronous
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::39024223b7f95bbf6548ce1ad8c5c379
https://doi.org/10.1587/transele.e94.c.1669
https://doi.org/10.1587/transele.e94.c.1669
Publikováno v:
SIMULATION. 83:571-586
Concurrency can be implemented in a Web server using synchronous or asynchronous mechanisms provided by the underlying operating system. Compared to the synchronous mechanisms, asynchronous mechanisms are attractive because they provide the benefit o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b932a102c54e1fe797c014e0eceb533c
https://doi.org/10.1177/0037549707080891
https://doi.org/10.1177/0037549707080891
Autor:
Koichiro Matsuno
Publikováno v:
Biosystems. 46:57-71
Time is intrinsically locally asynchronous, dynamic in itself, and self-organizing in having locally asynchronous time precipitate further asynchronous time while leaving behind globally synchronous time. The resulting global synchronism is skewed in
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::cd41b90ec0454b9d5c80a8667b629073
https://doi.org/10.1016/s0303-2647(97)00081-6
https://doi.org/10.1016/s0303-2647(97)00081-6
Publikováno v:
SPAA
We consider the problem of asynchronous execution of parallel programs. We assume that the original program is designed for a synchronous system, whereas the actual system may be asynchronous. We seek an automatic execution scheme , which allows the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a1fe265ad1aec7d144ef5f5fb7f34a03
https://doi.org/10.1006/inco.1997.2653
https://doi.org/10.1006/inco.1997.2653
Autor:
Venkatesh Akella, Tony L. Werner
Publikováno v:
Computer. 30:67-76
Virtually all computers today are synchronous. As systems grow increasingly large and complex the clock can cause big problems with clock skew, a timing delay that can create havoc with the overall design. It can also increase the circuit silicon and
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ce9dece4fc553016c4ac699e60d717ee
https://doi.org/10.1109/2.634866
https://doi.org/10.1109/2.634866
Autor:
V. S. Veeravalli, Jakob Lechner
Publikováno v:
ASYNC
In this paper we describe a new design approach for fault-tolerant globally asynchronous locally synchronous (GALS) systems using triple modular redundancy. The paper proposes a recovery and voting mechanism that relies on asynchronous, delay-insensi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f957e802e5df46a1b53a8cb3bcd04a46
https://doi.org/10.1109/async.2013.23
https://doi.org/10.1109/async.2013.23
Publikováno v:
Asian Test Symposium
Testing asynchronous circuits has been a challenge for several years. Especially, the nondeterministic timing behavior leads to problems during test, since the occurrence of test responses is not aligned to tester cycles. For this reason a test proce
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::661f957bd9aa5479a2ed6d6ce94496b9
https://doi.org/10.1109/ats.2012.40
https://doi.org/10.1109/ats.2012.40
Publikováno v:
Asian Test Symposium
Due to asynchronous timing and arbitration asynchronous designs may behave no deterministically. For the test of such systems, this means that an exact timing, i.e. a tester cycle, of a test response cannot be guaranteed. This behavior makes function
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::924978664bf5eef3455ab4934590dce5
https://doi.org/10.1109/ats.2011.17
https://doi.org/10.1109/ats.2011.17
Publikováno v:
Department of Computer Science Technical Reports
PLDI
PLDI
Although asynchronous communication is an important feature of many concurrent systems, building composable abstractions that leverage asynchrony is challenging. This is because an asynchronous operation necessarily involves two distinct threads of c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::5df213b78b193abc99b54ec8001149dd
https://doi.org/10.1145/1993498.1993572
https://doi.org/10.1145/1993498.1993572