Zobrazeno 1 - 10
of 10
pro vyhledávání: '"Prithviraj Pachal"'
Autor:
Sourav Guha, Prithviraj Pachal
Publikováno v:
Silicon. 14:3357-3369
In this paper, a novel symmetric double-gate TFET with elevated mid-channel is proposed with Si1-xGex heterojunction as the source and its performance has been extensively analyzed. Proposed device design successfully suppresses ambipolar conductivit
Autor:
Prithviraj Pachal, Sourav Guha
Publikováno v:
IEEE Transactions on Nanotechnology. 20:576-583
The objective of this paper is to exemplify the significant improvements achieved in speed and power-consumption by utilizing negative-capacitance Tunnel FETs in sub-0.4 VDD digital logic applications. A heterojunction negative-capacitance TFET (NCTF
Autor:
Sourav Guha, Prithviraj Pachal
Publikováno v:
2022 IEEE VLSI Device Circuit and System (VLSI DCS).
Publikováno v:
Microsystem Technologies. 27:3977-3985
Gas sensor devices usage have found prominence in fields like artificial olfactory systems and is often used to keep in check pollution and other toxic gas hazards. Graphene mono-layered sensing material along with Gold nano-particles have been previ
Publikováno v:
2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS).
In this work the authors presented a 2-D analytical drain current model of graded channel tri-metal double gate (TMDG) TFET with stacked gate-oxide structure. The parabolic approximation method with suitable boundary conditions has been applied to so
Publikováno v:
2020 IEEE VLSI DEVICE CIRCUIT AND SYSTEM (VLSI DCS).
Tunnel Field Transistor (TFET) has emerged as a promising candidate in VLSI industry for low power and high speed applications due to its ability to have subthreshold swing (SS) lesser than 60mV/decade at room temperature. In this work, the performan
Publikováno v:
2019 TEQIP III Sponsored International Conference on Microwave Integrated Circuits, Photonics and Wireless Networks (IMICPW).
This work illustrates the methodical analysis of underlapping double Gate (U-DG) junctionless (JL) MOSFET architecture with oxide stacked under persuade of high-k spacer layer. Underlap concept is generally utilized towards source/drain region to dim
Publikováno v:
Superlattices and Microstructures. 146:106657
In this work, an innovative structure of a novel double gate tunnel field-effect transistor (TFET) is proposed with a channel length of 20 nm.The gate dielectric regions have been renovated by inserting metal strips and using stacked gate-oxide conce
Autor:
Anup Dey, Prithviraj Pachal, Saikat Roy Chowdhury, Subhrapratim Nath, Subir Kumar Sarkar, Jamuna Kanta Sing
Publikováno v:
2018 IEEE Electron Devices Kolkata Conference (EDKCON).
Nano gas sensing technology finds its importance where gas sensors used for detecting the toxic gases have been fabricated and modified gradually to enhance its sensitivity and selectivity. Timely and precise monitoring of flammable and hazardous gas