Výsledky vyhledávání - "Premmilaah Gunasegaran"

A 40% PAE and 34dBm Peak OIP3 CMOS Power Amplifier with Integrated Zero Power Consumption Phase Linearizer

Autor: Premmilaah Gunasegaran, Jagadheswaran Rajendran, Selvakumar Mariappan, Yusman Yusof, Zulfiqar Ali Abd Aziz, Narendra Kumar

Publikováno v: Journal of Circuits, Systems and Computers.

In this paper, an Integrated Phase Linearizer (IPL) technique is designed to improve the linearity performance of a CMOS power amplifier (PA). The IPL is integrated at the gate of the PA so that the effect of the parasitic gate-to-source ([Formula: s

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::9b7978a72a14fe684188f1565de33651
https://doi.org/10.1142/s021812662350189x

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A 23 dBm Gain Shaping Stacked Power Block CMOS Power Amplifier Achieving 36% PAE

Autor: Premmilaah Gunasegaran, Sofiyah Sal Hamid, Narendra Kumar, Selvakumar Mariappan, Jagadheswaran Rajendran

Publikováno v: IETE Journal of Research. :1-8

This paper introduces a design methodology that reduces the fundamental trade-off between linearity and power added efficiency (PAE) in CMOS power amplifier (PA). In our work, a stacked power block...

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::3c689f847ef85487fc10bd1924382873
https://doi.org/10.1080/03772063.2021.1986149

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A fully matched dual stage CMOS power amplifier with integrated passive linearizer attaining 23 db gain, 40% PAE and 28 DBM OIP3

Autor: Premmilaah Gunasegaran, Jagadheswaran Rajendran, Zulfiqar Ali Abdul Aziz, Narendra Kumar, Selvakumar Mariappan, Yusman Mohd. Yusof

Publikováno v: Microelectronics International. 38:66-77

Purpose The purpose of this paper is to introduce a new linearization technique known as the passive linearizer technique which does not affect the power added efficiency (PAE) while maintaining a power gain of more than 20 dB for complementary metal

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::72c8baef3a54c9268cf60d09883295c2
https://doi.org/10.1108/mi-01-2021-0008

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High Efficiency CMOS Power Amplifier with Integrated Driver Based APD Linearizer

Autor: Premmilaah Gunasegaran, Jagadheswaran Rajendran, Selvakumar Mariappan, Zulfiqar Abdul Aziz, Yusman Mohd Yusof

Publikováno v: Lecture Notes in Electrical Engineering ISBN: 9789811681288

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::1c355731d045c26ffdb08afaa519a04d
https://doi.org/10.1007/978-981-16-8129-5_55

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A CMOS 180nm class-AB power amplifier with intergrated phase linearizer for BLE 4.0 achieving 11.5dB gain, 38.4% PAE and 20dBm OIP3

Autor: Premmilaah Gunasegaran, Harikrishnan Ramiah, Jagadheswaran Rajendran

Publikováno v: 2017 IEEE Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics (PrimeAsia).

In this paper, the design of a low power consumption linear power amplifier (PA) for Bluetooth Low Energy (BLE) application is presented. A passive linearizer is integrated at the input of the CMOS PA to nullify the effect of the Cgs capacitance thus

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::3d91bd01ef759947ad9fb5201f9904f1
https://doi.org/10.1109/primeasia.2017.8280364

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