Zobrazeno 1 - 10
of 31
pro vyhledávání: '"Pohua P. Chang"'
Publikováno v:
International Journal of Parallel Programming. 24:209-234
Conditional branches incur a severe performance penalty in wide-issue, deeply pipelined processors. Speculative execution(1, 2) and predicated execution(3---9) are two mechanisms that have been proposed for reducing this penalty. Speculative executio
Publikováno v:
IEEE Transactions on Computers. 44:481-494
To effectively exploit instruction level parallelism, the compiler must move instructions across branches. When an instruction is moved above a branch that it is control dependent on, it is considered to be speculatively executed since it is executed
Publikováno v:
IEEE Transactions on Computers. 44:353-370
Superscalar and superpipelined processors utilize parallelism to achieve peak performance that can be several times higher than that of conventional scalar processors. In order for this potential to be translated into the speedup of real program, the
Autor:
Daniel M. Lavery, Richard E. Hank, William Y. Chen, Tokuzo Kiyohara, Grant Haab, John G. Holm, Wen-mei W. Hwu, Nancy J. Warter, Roland G. Ouellette, Scott Mahlke, Roger A. Bringmann, Pohua P. Chang
Publikováno v:
The Journal of Supercomputing. 7:229-248
A compiler for VLIW and superscalar processors must expose sufficient instruction-level parallelism (ILP) to effectively utilize the parallel hardware. However, ILP within basic blocks is extremely limited for control-intensive programs. We have deve
Publikováno v:
IEEE Transactions on Computers. 42:1045-1057
Shows that code expanding optimizations have strong and nonintuitive implications on instruction cache design. Three types of code expanding optimizations are studied in this paper: instruction placement, function inline expansion, and superscalar op
Publikováno v:
Software: Practice and Experience. 22:349-369
SUMMARY This paper describes critical implementation issues that must be addressed to develop a fully automatic inliner. These issues are: integration into a compiler, program representation, hazard prevention, expansion sequence control, and program
Publikováno v:
Software: Practice and Experience. 21:1301-1321
This paper describes the design and implementation of an optimizing compiler that automatically generates profile information to assist classic code optimizations. This compiler contains two new components, an execution profiler and a profile-based c
Autor:
Wen-mei W. Hwu, Pohua P. Chang
Publikováno v:
[1988] Proceedings of the 21st Annual Workshop on Microprogramming and Microarchitecture - MICRO '21.
Microcode optimization techniques such as code scheduling and resource allocation can benefit significantly by reducing uncertainties in program control flow. A trace selection algorithm with profiling information reduces the uncertainties in program
Publikováno v:
The 16th Annual International Symposium on Computer Architecture.
Autor:
W.W. Hisu, null Pohua P. Chang
Publikováno v:
The 16th Annual International Symposium on Computer Architecture.