Zobrazeno 1 - 10
of 78
pro vyhledávání: '"Po Yi Kuo"'
Publikováno v:
Advanced Science, Vol 10, Iss 9, Pp n/a-n/a (2023)
Abstract In this work, the authors demonstrate a novel vertically‐stacked thin film transistor (TFT) architecture for heterogeneously complementary inverter applications, composed of p‐channel polycrystalline silicon (poly‐Si) and n‐channel a
Externí odkaz:
https://doaj.org/article/3231c8bc313b433e97f33e85e41b336c
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 8, Pp 1317-1322 (2020)
In this work, polycrystalline-silicon thin-film transistors (poly-Si TFTs) with asymmetric low metal contamination Ni-induced lateral crystallization (LC-NILC) poly-Si channel and high-κ HfO2 gate insulator (GI) have been successfully fabricated and
Externí odkaz:
https://doaj.org/article/47cc88f06816419e9ce313190c40cb3f
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 6, Pp 314-319 (2018)
In this paper, the influence of channel doping concentration and reverse boron penetration on p-type Pi-gate (PG) poly-Si junctionless accumulation mode (JAM) FETs has been experimentally investigated and discussed. Effective carrier concentration (N
Externí odkaz:
https://doaj.org/article/712d31a80e4e4b95bf7e74717e6f562f
Publikováno v:
Nanomaterials, Vol 11, Iss 11, p 3070 (2021)
The integration of 4 nm thick amorphous indium tungsten oxide (a-IWO) and a hafnium oxide (HfO2) high-κ gate dielectric has been demonstrated previously as one of promising amorphous oxide semiconductor (AOS) thin-film transistors (TFTs). In this st
Externí odkaz:
https://doaj.org/article/8f2f2df2639b432aa571c3967b6fa3cd
Publikováno v:
IEEE Transactions on Electron Devices. 69:4791-4795
Publikováno v:
2022 8th International Conference on Applied System Innovation (ICASI).
Autor:
Yu-En Huang, Chiuan-Huei Shen, Tien-Sheng Chao, Chun-Chih Chung, Shen-Yang Lee, Hsin-Yu Chen, Po-Yi Kuo, Han-Wei Chen
Publikováno v:
IEEE Transactions on Electron Devices. 67:711-716
In this article, we successfully fabricated nanowire (NW) negative capacitance (NC)-related ferroelectric FETs (FE-FETs) with two structures: trigate (TG) and gate-all-around (GAA). Planar capacitors with a metal–FE–metal (MFM) structure were inv
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 8, Pp 1317-1322 (2020)
In this work, polycrystalline-silicon thin-film transistors (poly-Si TFTs) with asymmetric low metal contamination Ni-induced lateral crystallization (LC-NILC) poly-Si channel and high- $\kappa $ HfO2 gate insulator (GI) have been successfully fabric
Publikováno v:
IEEE Transactions on Nanotechnology. 19:322-327
In this article, poly-Si gate-all-around (GAA) field effect transistors (FETs) using sidewall damascene method are successfully demonstrated. By manipulating the stress which is imposed by nitride layer, the crystallinity of poly-Si channels can be m
Autor:
Tien-Sheng Chao, Yu-En Huang, Chun-Chih Chung, Shen-Yang Lee, Han-Wei Chen, Hsin-Yu Chen, Po-Yi Kuo, Chiuan-Huei Shen
Publikováno v:
IEEE Electron Device Letters. 40:1708-1711
For the first time, two-layer stacked nanowire gate-all-around (GAA) negative capacitance (NC) field-effect transistors (FETs) with an ultrasmall poly-Si channel that has a size of $5.3\times9$ nm2 and a metal-ferroelectric-metal-insulator-semiconduc