Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Plinio, Bau"'
Publikováno v:
2023 IEEE Applied Power Electronics Conference and Exposition (APEC).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c0ad03b0112d73c7c1759a81e84b7abb
https://doi.org/10.1109/apec43580.2023.10131398
https://doi.org/10.1109/apec43580.2023.10131398
Publikováno v:
IEEE Transactions on Power Electronics
IEEE Transactions on Power Electronics, Institute of Electrical and Electronics Engineers, 2020, 35 (12), pp.13322-13332. ⟨10.1109/TPEL.2020.2995531⟩
IEEE Transactions on Power Electronics, Institute of Electrical and Electronics Engineers, 2020, 35 (12), pp.13322-13332. ⟨10.1109/TPEL.2020.2995531⟩
This article shows both theoretical and experimental analyses of a fully integrated CMOS active gate driver (AGD) developed to control the high d v /d t of GaN transistors for both 48 and 400 V applications. To mitigate negative effects in the high-f
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a1ed55000b7e39e48e88e320dd69d6c4
https://doi.org/10.1109/tpel.2020.2995531
https://doi.org/10.1109/tpel.2020.2995531
Publikováno v:
Symposium de Génie Electrique 2021
Symposium de Génie Electrique 2021, Jul 2021, Nantes, France
HAL
Symposium de Génie Electrique 2021, Jul 2021, Nantes, France
HAL
International audience; Dans cet article, nous présentons une technique de contrôle actif de grille pour maitriser la vitesse de commutation de transistors de puissance à semi-conducteur grand-gap. Un circuit de commande rapprochée innovant, perm
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::3ec0de0825a94f7b510a836ea2b663cd
https://hal.science/hal-02966771
https://hal.science/hal-02966771
Publikováno v:
2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD)
2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD), Sep 2020, Vienna ( virtual ), Austria. pp.106-109, ⟨10.1109/ISPSD46842.2020.9170106⟩
2020 32nd International Symposium on Power Semiconductor Devices and ICs (ISPSD), Sep 2020, Vienna ( virtual ), Austria. pp.106-109, ⟨10.1109/ISPSD46842.2020.9170106⟩
International audience; The objective of this work is to show the intrinsic limitations of a CMOS technology for the realization of an Active Gate Driver (AGD) with active dv/dt control loop. Due to a theoretical study using first order models of CMO
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::98eced9805833c1f4bce4070cfde2e26
https://hal.archives-ouvertes.fr/hal-02920181/document
https://hal.archives-ouvertes.fr/hal-02920181/document
Autor:
Plinio, Bau, Cousineau, Marc, Cogo, Bernardo, RICHARDEAU, Frédéric, Sébastien, Vinnac, Flumian, Didier, Rouger, Nicolas
Publikováno v:
31st IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD)
31st IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD), May 2019, Shanghai, China
31st IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD), May 2019, Shanghai, China. ⟨10.1109/ispsd.2019.8757693⟩
31st IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD), May 2019, Shanghai, China
31st IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD), May 2019, Shanghai, China. ⟨10.1109/ispsd.2019.8757693⟩
International audience; This paper presents an AGD (active gate driver) implemented with a low voltage CMOS technology to control the dv/dt sequence of low voltage (100V) and high voltage (650V) GaN power transistors. Such an AGD can control and redu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::a502f8b2ffbe0659aa52312b3d9465d3
https://hal.archives-ouvertes.fr/hal-02157332
https://hal.archives-ouvertes.fr/hal-02157332
Publikováno v:
14th Conference on PhD Research in Microelectronics and Electronics (PRIME 2018)
2018 14th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)
2018 14th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), Jul 2018, Prague, France. pp.105-108, ⟨10.1109/PRIME.2018.8430331⟩
PRIME
2018 14th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)
2018 14th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), Jul 2018, Prague, France. pp.105-108, ⟨10.1109/PRIME.2018.8430331⟩
PRIME
In this paper, a CMOS gate driver in $180\mathrm {n}\mathrm {m}$ technology is presented. The gate driver implements an integrated and independent ultra-fast $\mathrm {d}\mathrm {V}/\mathrm {d}\mathrm {t}$ control circuit dedicated to manage switch-o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::de4282b08ab9b1547c280010393c9cbf
https://hal.archives-ouvertes.fr/hal-02335492
https://hal.archives-ouvertes.fr/hal-02335492