Zobrazeno 1 - 10 of 126 pro vyhledávání: '"Pineda de Gyvez, J."'
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Akademický článek
Increasing the energy efficiency of microcontroller platforms with low-design margin co-processors
Autor: Gomez, A., Bartolini, A., Rossi, D., Can Kara, B., Fatemi, H., Pineda de Gyvez, J., Benini, L.
Publikováno v: In Microprocessors and Microsystems August 2017 53:213-228
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Synthesis and VHDL Implementation of Fuzzy Logic Controller for Dynamic Voltage and Frequency Scaling (DVFS) Goals in Digital Processors
Autor: Pourshaghaghi, H.R., Echeverri Escobar, J.D., Pineda de Gyvez, J., Dadios, E.P.
Publikováno v: Fuzzy logic : controls, concepts, theories and applications, 185-202
STARTPAGE=185;ENDPAGE=202;TITLE=Fuzzy logic : controls, concepts, theories and applications
The concept of power consumption is becoming the primary concern in modern high performance processors, and in digital circuits and system on chips (SoCs). While CMOS technology has been scaling towards smaller feature sizes, the performance of digit
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::fbf355b13bf4af2f8e0c4bb7a8cc4711
https://doi.org/10.5772/36184
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4
A 1.2V 55mW 12bits self-calibrated dual-residue analog to digital converter in 90 nm CMOS
Autor: Zjajo, A., Pineda de Gyvez, J.
Publikováno v: International Symposium on Low Power Electronics and Design, ISLPED 2011, 1-3 August 2011, Fukuoka, Japan, 187-192
STARTPAGE=187;ENDPAGE=192;TITLE=International Symposium on Low Power Electronics and Design, ISLPED 2011, 1-3 August 2011, Fukuoka, Japan
This paper reports design, optimization, efficiency and measurement results of the 12 bits dual-residue multi-step A/D converter. The calibration procedure based on the steepest-descent estimation method is enhanced with dedicated embedded sensors, w
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::20e1ad7455c2e5a35412fac6ec20d544
https://doi.org/10.1109/islped.2011.5993634
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5
Adaptive voltage (frequency) scaling based on fuzzy logic controllers
Autor: Pourshaghaghi, H.R., Pineda de Gyvez, J.
Publikováno v: Proceedings of ProRISC 2009, 20th Annual Workshop on Circuits Systems and Signal Processing, November 26-27, 2009, Veldhoven, The Netherlands, 263-268
STARTPAGE=263;ENDPAGE=268;TITLE=Proceedings of ProRISC 2009, 20th Annual Workshop on Circuits Systems and Signal Processing, November 26-27, 2009, Veldhoven, The Netherlands
In this paper, a dynamic voltage (frequency) scaling method based on a fuzzy logic controller is proposed that adjusts the voltage (frequency) of a processor according to workload variations. In this method, voltage scaling decisions are made by a fu
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=narcis______::36cf46c245a9bf2215e2298793f290b4
https://research.tue.nl/nl/publications/0da4cac8-b523-4b2c-a8f6-8061adab3009
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6
Post-silicon tuning capabilities of 45nm low-power CMOS digital circuits
Autor: Meijer, M., Liu, B., Veen, van, R., Pineda de Gyvez, J.
Publikováno v: Proceedings of 2009 Symposium on VLSI Circuits, 16-18 June 2009, Honolulu, Hawaii, 110-111
STARTPAGE=110;ENDPAGE=111;TITLE=Proceedings of 2009 Symposium on VLSI Circuits, 16-18 June 2009, Honolulu, Hawaii
Adaptive circuit techniques enable modification of power-performance efficient circuit operation. Yet it is unclear if such techniques remain effective in modern deep-submicron CMOS. In this paper we examine the technological boundaries of supply vol
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=narcis______::b4767c2e79aa4b9a7d352a889fcfac8c
https://research.tue.nl/nl/publications/74329ac8-7227-45bd-9368-32050b34596f
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7
Technological boundaries of voltage and frequency scaling for power performance tuning
Autor: Meijer, M., Pineda de Gyvez, J., Wang, A., Naffziger, S.
Publikováno v: Adaptive Techniques for Dynamic Processor Optimization ISBN: 9780387764719
Adaptive Techniques for Dynamic Processor Optimization : Theory and Practice, 25-47
STARTPAGE=25;ENDPAGE=47;TITLE=Adaptive Techniques for Dynamic Processor Optimization : Theory and Practice
In this chapter, we concentrate on technological quantitative pointers for adaptive voltage scaling (AVS) and adaptive body biasing (ABB) in modem CMOS digital designs. In particular, we will present the power savings that can be expected, the power-
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::b4fb86fce183e0e9daff446983ed7797
https://doi.org/10.1007/978-0-387-76472-6_2
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Statistical noise margin estimation for sub-threshold combinational circuits
Autor: Pu, Yu, Pineda de Gyvez, J., Corporaal, H., Ha, Y.
Publikováno v: Proceedings of ASPDAC 2008, 176-179
STARTPAGE=176;ENDPAGE=179;TITLE=Proceedings of ASPDAC 2008
The increasingly popular sub-threshold design is strongly calling for EDA support to estimate noise margins, minimum functional supply voltage, as well as the functional yield. In this paper, we propose a fast, accurate and statistical approach to ac
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e8bd63dbcd61dbb92f6b9dea529d0d82
https://doi.org/10.1109/aspdac.2008.4483935
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10
Defect-oriented testing for nano-metric CMOS VSLI circuits
Autor: Sachdev, M., Pineda de Gyvez, J.
Failures of nano-metric technologies owing to defects and shrinking process tolerances give rise to significant challenges for IC testing. As the variation of fundamental parameters such as channel length, threshold voltage, thin oxide thickness and
Externí odkaz: https://explore.openaire.eu/search/publication?articleId=narcis______::06b7920ac760a40a3dacdf7698b45f70
https://research.tue.nl/nl/publications/1474032e-4503-4b7d-a000-42fadf4c0727
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