Zobrazeno 1 - 5
of 5
pro vyhledávání: '"Pieter Demuytere"'
Publikováno v:
IEICE Electronics Express. 7:1640-1645
More and more TVoIP services are emerging on the market using RTP to compensate for the dynamic routing. Interactive applications, however, still suffer from the network's long latency. Offloading to the access network offers a solution. In this pape
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::75fed6125a8e09e2a8b78325afbec03c
https://doi.org/10.1587/elex.7.1640
https://doi.org/10.1587/elex.7.1640
Autor:
Pieter Demuytere, Bart Baekelandt, Jan Vandewege, C. Melange, Xing-Zhi Qiu, Tine De Ridder, Xin Yin, Jan Gillis, Johan Bauwelinck
Publikováno v:
Optical Fiber Communication Conference.
This paper presents a chain of four fully DC-coupled 10Gb/s burst-mode prototypes operating with 58ns overhead for the first time. 10Gb/s upstream burst-mode experiments are performed without a time-critical reset signal from test equipment.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fc3dad970aeec7e8b082965bcd5e8ec2
https://doi.org/10.1364/ofc.2010.owx2
https://doi.org/10.1364/ofc.2010.owx2
Autor:
Johan Bauwelinck, Xin Yin, Peter Spiessens, Huub Tubbax, Johan Danneels, Peter Debacker, Jan Vandewege, Johan Wouters, Guy Torfs, Jan Olbrechts, Pieter Demuytere, Frederic Stubbe
Publikováno v:
ELECTRONICS LETTERS
A new embedded ranging system in the ISM band is described. The proposed indoor ranging system combines the advantages of both broadband and narrowband signals to achieve high ranging accuracy in the presence of strong multipath reflections to achiev
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::14f66d4838ffdfa383fdfbda771072d2
https://biblio.ugent.be/publication/430977
https://biblio.ugent.be/publication/430977
Autor:
Xing-Zhi Qiu, Pieter Demuytere, S. Verschuere, K. Van Renterghem, Dieter Verhulst, Jan Vandewege
Publikováno v:
Proceedings of the International Conference on Field Programmable Logic and Applications 2006
FPL
FPL
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node. The processor has an architecture optimized to handle flow processing tasks such as parsing, cla
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::7d910d3b1d9ac861639c1516f0cd0b7b
https://hdl.handle.net/1854/LU-355683
https://hdl.handle.net/1854/LU-355683
Autor:
Pieter Demuytere, Jan Vandewege, Xing-Zhi Qiu, Johan Bauwelinck, K. Van Renterghem, C. Melange, Bart Baekelandt, T. De Ridder
Publikováno v:
Electronics Letters. 45:694
A novel mixed analogue/digital design of a phase picking algorithm in an oversampling clock phase recovery is presented. The proposed approach results in reduced processing time, improved integrability with analogue front-end and low noise generation
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b78645c44e2a6fefd1793917b8db9861
https://doi.org/10.1049/el.2009.3525
https://doi.org/10.1049/el.2009.3525