Zobrazeno 1 - 10
of 32
pro vyhledávání: '"Piet Vanmeerbeek"'
Autor:
Maria R. Rogina, Alberto Rodriguez, Diego G. Lamar, Jaume Roig, German Gomez, Piet Vanmeerbeek
Publikováno v:
Energies, Vol 13, Iss 5, p 1124 (2020)
Switching losses of power transistors usually are the most relevant energy losses in high-frequency power converters. Soft-switching techniques allow a reduction of these losses, but even under soft-switching conditions, these losses can be significa
Externí odkaz:
https://doaj.org/article/4744dfab9859404b871571a80b2cd74a
Autor:
Diego G. Lamar, Maria R. Rogina, Piet Vanmeerbeek, Jaume Roig, Filip Bauwens, Alberto Rodriguez
Publikováno v:
RUO. Repositorio Institucional de la Universidad de Oviedo
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An insightful evaluation of commercial highvoltage power MOSFETs for soft-switching converters is reported in this paper with special emphasis on elucidating power loss contributions and electrical parameter requirements. Experimental tests have been
Autor:
Piet Vanmeerbeek, Gaudenzio Meneghesso, Davide Bisi, Matteo Meneghini, Enrico Zanoni, Peter Moens, Abhishek Banerjee, Riccardo Silvestri, Stefano Dalcanale
Publikováno v:
IEEE Transactions on Electron Devices. 62:782-787
This paper reports an investigation of the trapping mechanisms responsible for the temperature-dependent dynamic- $R_{\mathrm {\mathrm{{\scriptstyle ON}}}}$ of GaN-based metal–insulator–semiconductor (MIS) high electron mobility transistors (HEMT
Publikováno v:
Uren, M J, Caesar, M, Karboyan, S, Moens, P, Vanmeerbeek, P & Kuball, M H H 2015, ' Electric Field Reduction in C-Doped AlGaN/GaN on Si High Electron Mobility Transistors ', IEEE Electron Device Letters, vol. 36, no. 8, pp. 826-828 . https://doi.org/10.1109/led.2015.2442293
It is shown by simulation supported by experiment that a reduced surface field effect, associated with compensated deep acceptors, can occur in carbon doped GaN-on-Si power switching AlGaN/GaN transistors, provided there is a vertical leakage path fr
Autor:
Steven Vandeweghe, Peter Coppens, Luc De Schepper, Peter Moens, Piet Vanmeerbeek, Abhishek Banerjee
Publikováno v:
2016 IEEE International Reliability Physics Symposium (IRPS).
The first section of this article focuses on the investigations of the gate leakage conduction mechanisms under forward and reverse bias conditions using temperature dependent Jg-Eg characteristics on a Silicon Nitride (SiN)/AlGaN based Metal-Insulat
Autor:
Vincenzo d'Alessandro, David Flores, Andrea Irace, Ana Villamor-Baliarda, Peter Moens, Jaume Roig, Michele Riccio, Piet Vanmeerbeek
Publikováno v:
Microelectronics Reliability. 52:2409-2413
One of the most important process parameters impacting the electrical performance in Super Junction (SJ) devices is the Charge Balance (CB). This paper demonstrates that the avalanche current capability in SJ diodes is not only dependent on the CB of
Publikováno v:
Microelectronics Reliability. 51:1959-1963
The electric field balancing in the guard-ring edge termination structure of 600 V class Super-Junction devices is studied. The relation of the lateral electric field across the racetrack structure and the robustness of the structure against avalanch
Next generation of Deep Trench Isolation for Smart Power technologies with 120V high-voltage devices
Autor:
P. Gassot, S. Mouhoubi, B. Desoete, R. Charavel, Peter Moens, Jaume Roig, E. De Backer, Filip Bauwens, Piet Vanmeerbeek
Publikováno v:
Microelectronics Reliability. 50:1758-1762
A new Deep Trench Isolation (DTI) structure with high-voltage capability (BV > 150 V) and latch-up suppression (log(I c /I e ) < -2 in adjacent pockets) is experimentally demonstrated in this work. The new DTI is implemented in a Nepi/BLN/N - /P + Si
Autor:
Matteo Meneghini, Enrico Zanoni, Gaudenzio Meneghesso, Riccardo Silvestri, Piet Vanmeerbeek, Peter Moens
This paper presents an analysis of the high voltage trapping processes that take place in high-electron mobility transistors based on GaN, with a metal–insulator–semiconductor (MIS) structure. The study is based on combined pulsed and transient m
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::f71f6bcd8276c874e6bd257fbd7b88f0
http://hdl.handle.net/11577/3224222
http://hdl.handle.net/11577/3224222
Publikováno v:
Microelectronics Reliability. 47:1389-1393
High resolution time-dependent dielectric breakdown tests are carried out on 7.2 nm gate oxide capacitors (n-type) in the electric field range 8.3–13.2 MV/cm at high temperatures (160–240 °C). It is proven that even at these high temperatures lo