Zobrazeno 1 - 9
of 9
pro vyhledávání: '"Pierre-Edouard Beaucamps"'
Publikováno v:
DASIP
This document describes a demonstration, proposed at DASIP Demo Night session. This demonstration is running on a low-power manycore processor from Kalray, named MPPA® and is highlighting capabilities of this new generation chip in processing multip
Autor:
Benoit Ganne, Patrice Couvert, Renaud Ayrignac, Benoît Dupont de Dinechin, Samuel Jones, Frederic Riss, Thierry Strudel, Nicolas Morey Chaisemartin, Francois Jacquet, Pierre Guironnet de Massas, Pierre-Edouard Beaucamps
Publikováno v:
HPEC
The Kalray MPPA-256 processor integrates 256 user cores and 32 system cores on a chip with 28nm CMOS technology. Each core implements a 32-bit 5-issue VLIW architecture. These cores are distributed across 16 compute clusters of 16+1 cores, and 4 quad
Extended Cyclostatic Dataflow Program Compilation and Execution for an Integrated Manycore Processor
Autor:
Samuel Jones, Bruno Bodin, Francois Galea, Thierry Goubier, Loïc Cudennec, Pascal Aubry, Michel Harrand, Vincent David, Sergiu Carpov, Jean-Denis Lesage, Stéphane Louise, Paul Dubrulle, Frédéric Blanc, Philippe Dore, Pierre-Edouard Beaucamps, Benoît Dupont de Dinechin, Nicolas Morey Chaisemartin, Thanh Hai Nguyen, Xavier Raynaud, Renaud Sirdey
Publikováno v:
ICCS
Alchemy 2013-Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems
Alchemy 2013-Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems, Jun 2013, Barcelona, Spain. pp.1624-1633, ⟨10.1016/j.procs.2013.05.330⟩
Procedia Computer Science
Alchemy 2013-Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems
Alchemy 2013-Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems, Jun 2013, Barcelona, Spain. pp.1624-1633, ⟨10.1016/j.procs.2013.05.330⟩
Procedia Computer Science
International audience; The ever-growing number of cores in embedded chips emphasizes more than ever the complexity inherent to parallel programming. To solve these programmability issues, there is a renewed interest in the dataflow paradigm. In this
Autor:
GONNORD, LAURE1 laure.gonnord@esisar.grenoble-inp.fr, HENRIO, LUDOVIC2 ludovic.henrio@cnrs.fr, MOREL, LIONEL3 lionel.morel@insa-lyon.fr, RADANNE, GABRIEL4 gabriel.radanne@ens-lyon.fr
Publikováno v:
ACM Computing Surveys. Oct2023, Vol. 55 Issue 10, p1-28. 28p.
Publikováno v:
DAC: Annual ACM/IEEE Design Automation Conference; 2019, Issue 56, p1243-1246, 4p
Publikováno v:
2014 Eighth International Conference on Complex, Intelligent & Software Intensive Systems; 2014, p433-438, 6p
Autor:
Paduraru, Ciprian I.
Publikováno v:
2014 IEEE 13th International Symposium on Parallel & Distributed Computing; 2014, p87-94, 8p
Autor:
Subramanian, Suvinay, Jeffrey, Mark C., Abeydeera, Maleen, Lee, Hyun Ryong, Ying, Victor A., Emer, Joel, Sanchez, Daniel
Publikováno v:
ACM SIGARCH Computer Architecture News; May2017, Vol. 45 Issue 2, p587-599, 13p
Autor:
de Dinechin, Benoit Dupont, Ayrignac, Renaud, Beaucamps, Pierre-Edouard, Couvert, Patrice, Ganne, Benoit, de Massas, Pierre Guironnet, Jacquet, Francois, Jones, Samuel, Chaisemartin, Nicolas Morey, Riss, Frederic, Strudel, Thierry
Publikováno v:
2013 IEEE High Performance Extreme Computing Conference (HPEC); 2013, p1-6, 6p