Zobrazeno 1 - 10
of 34
pro vyhledávání: '"Pierre Bomel"'
Publikováno v:
Journal of Low Power Electronics
Journal of Low Power Electronics, American Scientific Publishers, 2017, Journal of Low Power Electronics, 13 (3), pp.441-455. ⟨10.1166/jolpe.2017.1500⟩
Journal of Low Power Electronics, American Scientific Publishers, 2017, Journal of Low Power Electronics, 13 (3), pp.441-455. ⟨10.1166/jolpe.2017.1500⟩
International audience; Networks-on-Chip (NoCs) are recognized to be the solution to address the communication bottleneck in many-core systems. As the NoC represents a significant part of the system power consumption, NoC energy consumption optimizat
Publikováno v:
Microprocessors and Microsystems: Embedded Hardware Design (MICPRO)
Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2018, 61, pp.135-153. ⟨10.1016/j.micpro.2018.06.004⟩
Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2018, 61, pp.135-153. ⟨10.1016/j.micpro.2018.06.004⟩
This paper presents a technique using a genetic algorithm to compute an efficient routing for an application-specific NoC (Network-on-Chip). The main goal of this paper is to introduce multi-objective optimization techniques to address the NoC routin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::70e45a56734e313e6c7525ab1dfbfd24
https://hal.archives-ouvertes.fr/hal-01821361
https://hal.archives-ouvertes.fr/hal-01821361
Publikováno v:
IEEE Transactions on Multi-Scale Computing Systems
IEEE Transactions on Multi-Scale Computing Systems, IEEE, 2018, 4 (2), pp.177-187. ⟨10.1109/TMSCS.2018.2810223⟩
IEEE Transactions on Multi-Scale Computing Systems, IEEE, 2018, 4 (2), pp.177-187. ⟨10.1109/TMSCS.2018.2810223⟩
This paper proposes a new fully adaptive routing protocol for 2D-mesh Network-on-Chip (NoCs). It is inspired from the A-star search algorithm and called Heuristic based Routing Algorithm (HRA). It is distributed, congestion-aware, and fault-tolerant
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::b5c747007da9db12ad12c975a79aba84
https://hal.archives-ouvertes.fr/hal-01720279
https://hal.archives-ouvertes.fr/hal-01720279
Publikováno v:
International Symposium on Power and Timing Modeling, Optimization and Simulation
PATMOS 2017
PATMOS 2017, Sep 2017, Thessaloniki, Greece
PATMOS
PATMOS 2017
PATMOS 2017, Sep 2017, Thessaloniki, Greece
PATMOS
International audience; Ultra-deep sub-micron technology is shifting the design paradigm from area optimization to power optimization. In the context of Network-on-Chip (NoC) based design, energy consumption due to data transfer among network nodes i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::104abafbceb5c2614c50661d16cccb35
http://hdl.handle.net/20.500.11769/320565
http://hdl.handle.net/20.500.11769/320565
Publikováno v:
DASIP
DASIP, Oct 2016, Rennes, France. ⟨10.1109/DASIP.2016.7853807⟩
DASIP, Oct 2016, Rennes, France. ⟨10.1109/DASIP.2016.7853807⟩
International audience; Networks-on-Chip (NoCs) are recognized as the solution to address the communication bottleneck in Multiprocessor System-on-Chip (MPSoC). As the NoC represents a significant part of the system power consumption, MPSoC designers
Publikováno v:
MCSoC
IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSOC)
IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSOC), Sep 2016, Lyon, France. pp.39-45, ⟨10.1109/MCSoC.2016.43⟩
IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSOC)
IEEE 10th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSOC), Sep 2016, Lyon, France. pp.39-45, ⟨10.1109/MCSoC.2016.43⟩
International audience; Deadlocks, livelock, congestion and faults are the four most important factors that reduce the NoC routing efficiency {[}1]. This paper proposes a new fully adaptive routing protocol for 2D-mesh NoC. It is inspired from the A-
Publikováno v:
ACM Transactions on Embedded Computing Systems (TECS)
ACM Transactions on Embedded Computing Systems (TECS), ACM, 2006, vol 5, No. 1, pp.29-53. ⟨10.1145/1132357.1132359⟩
ACM Transactions on Embedded Computing Systems (TECS), ACM, 2006, vol 5, No. 1, pp.29-53. ⟨10.1145/1132357.1132359⟩
IP integration, which is one of the most important SoC design steps, requires taking into account communication and timing constraints. In that context, design and reuse can be improved using IP cores described at a high abstraction level. In this pa
Autor:
Laurent Morin, Emmanuel Casseau, Jean-Philippe Diguet, Pierre Bomel, Erwan Raffin, Mickaël Raulet, Yaset Oliva, Kevin Martin, Herve Yviquel
Publikováno v:
DASIP
Conference on Design and Architectures for Signal and Image Processing, Demo Night
Conference on Design and Architectures for Signal and Image Processing, Demo Night, Oct 2014, Madrid, Spain. 2014
Conference on Design and Architectures for Signal and Image Processing, Demo Night
Conference on Design and Architectures for Signal and Image Processing, Demo Night, Oct 2014, Madrid, Spain. 2014
International audience; This paper presents the implementation of a video decoding application starting from its dataflow and CAL representations. Our objective is to demonstrate the ability of the Open RVC-CAL Compiler (Orcc) to generate code for em
Publikováno v:
DSD
17th Euromicro Conference on Digital System Design (DSD)
17th Euromicro Conference on Digital System Design (DSD), Aug 2014, Verona, Italy
HAL
17th Euromicro Conference on Digital System Design (DSD)
17th Euromicro Conference on Digital System Design (DSD), Aug 2014, Verona, Italy
HAL
When partially reconfigurable, FPGA-based, systems allow to dynamically hot-plug processors, the number of possible software configurations increases and the dynamic sharing of hardware peripherals becomes problematic. Moreover, the debugging of appl
Autor:
Marc Sevaux, Pierre Bomel
Publikováno v:
Proceedings of the Euromicro DSD/SEAA conference
Proceedings of the Euromicro DSD/SEAA conference, Sep 2013, Santander, Spain. pp.29-36
DSD
Proceedings of the Euromicro DSD/SEAA conference, Sep 2013, Santander, Spain. pp.29-36
DSD
International audience; Parallelized kernels for operations research belong to the class of the diffused computations of Dijkstra and Scholten. They communicate through small, constant-length (or at least bounded length) messages and quickly reach co
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::70cf5205431840eee32d99c0a4e85c3b
https://hal.archives-ouvertes.fr/hal-00878995
https://hal.archives-ouvertes.fr/hal-00878995