Zobrazeno 1 - 10
of 48
pro vyhledávání: '"Philip M. Watts"'
Autor:
Paolo Costa, Philip M. Watts, Thomas Gerard, Krzysztof Jozwik, Istvan Haller, Benn C. Thomsen, Hugh E. Williams, Adam Funnell, Hitesh Ballani, Kai Shi, Kari Clark
Publikováno v:
OFC
We propose amplitude caching to optically equalise burst mode traffic without delay stages. Through a fast, optically-switched system prototype, we demonstrate burst- mode penalties can be mitigated to within 0.4 dB at the KR4 HD-FEC level.
Autor:
Kari Clark, Hugh E. Williams, Thomas Gerard, Philip M. Watts, Paolo Costa, Krzysztof Jozwik, Zhixin Liu, Benn C. Thomsen, Kai Shi, Hitesh Ballani, Polina Bayvel, Georgios Zervas, Istvan Haller, Daniel Cletheroe
Publikováno v:
ECOC
We demonstrate a clock and data recovery technique that achieves
Autor:
Philip M. Watts, Andrew W. Moore, Yury Audzevich, Andrew A. West, Alan Mujumdar, Simon W. Moore
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 22:2081-2092
Network equipment power consumption is under increased scrutiny. To understand and decompose transceiver power consumption, we have created a toolkit incorporating a library of transceiver circuits in 45-nm CMOS and MOS current mode logic (MCML) and
Autor:
Paris Andreades, Philip M. Watts
Publikováno v:
ECOC
Using speculative transmission combined with a novel parallel scheduler design for practical photonic integrated switches based on the Clos architecture, we demonstrate a minimum latency of 47.2 ns in a rack scale 32×32 optically switched system.
Publikováno v:
Hot Interconnects
Meeting the exponential increase in the global demand for bandwidth has become a major concern for today's data centers. The scalability of any data center is defined by the maximum capacity and port count of the switching devices it employs, limited
Publikováno v:
Concurrency and Computation: Practice and Experience. 26:2551-2566
SUMMARY Optical networks on chip based on silicon photonics have been proposed to reduce latency and power consumption in future chip multiprocessors. However, high performance chip multiprocessors use a shared memory model, which generates large num
Publikováno v:
AISTECS@HiPEAC
Optical network-on-chip (NoC) are being investigated to reduce the latency and power consumption of networks for multicore processors. Our previous work has shown that switched optical networks can achieve lower latency for a given power consumption
Autor:
Adam Funnell, Paolo Costa, Joshua L. Benjamin, Benn C. Thomsen, Hitesh Ballani, Philip M. Watts
Publikováno v:
OFC
Scopus-Elsevier
Scopus-Elsevier
A WS-TDMA optical switch fabric scalable to 1024 ports is demonstrated. Fast tunable (
Publikováno v:
Journal of Lightwave Technology. 25:3089-3099
Advances in the performance and flexibility of future optical networks will be brought about through the use of high-speed digital signal processing (DSP) for the generation of advanced optical signal formats and the compensation of transmission impa
Autor:
Benn C. Thomsen, Paolo Costa, Joshua L. Benjamin, Hitesh Ballani, Philip M. Watts, Adam Funnell, Dan Alistarh
Publikováno v:
SIGCOMM
We demonstrate an optical switch design that can scale up to a thousand ports with high per-port bandwidth (25 Gbps+) and low switching latency (40 ns). Our design uses a broadcast and select architecture, based on a passive star coupler and fast tun