Zobrazeno 1 - 10
of 16
pro vyhledávání: '"Philip K. F. Hölzenspies"'
Publikováno v:
ACM transactions on embedded computing systems, 14(4). Association for Computing Machinery (ACM)
In this article, we present a mathematical characterisation of admissible schedules of cyclo-static dataflow ( csdf ) graphs. We demonstrate how algebra ic manipulation of this characterization is related to unfolding csdf actors and how this manipul
Autor:
Jan Kuper, Johann L. Hurink, T.D. ter Braak, Philip K. F. Hölzenspies, Gerardus Johannes Maria Smit
Publikováno v:
International journal of parallel programming, 38(1):10.1007/s10766-009-0120-y, 68-83. Springer
In this paper, we define the problem of spatial mapping. We present reasons why performing spatial mappings at run-time is both necessary and desirable. We propose what is—to our knowledge—the first attempt at a formal description of spatial mapp
Publikováno v:
18th Euromicro Conference on Digital Systems Design (DSD 2015), 271-275
STARTPAGE=271;ENDPAGE=275;TITLE=18th Euromicro Conference on Digital Systems Design (DSD 2015)
DSD
STARTPAGE=271;ENDPAGE=275;TITLE=18th Euromicro Conference on Digital Systems Design (DSD 2015)
DSD
Execution time is no longer the only performance metric for computer systems. In fact, a trend is emerging to trade raw performance for energy savings. Techniques like Dynamic Power Management (DPM, switching to low power state) and Dynamic Voltage a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::c2d4c36a285d8590ada943bf5a6234b7
https://research.utwente.nl/en/publications/0d747d82-dd8f-4f9e-8d0f-7b3ef21ffd2a
https://research.utwente.nl/en/publications/0d747d82-dd8f-4f9e-8d0f-7b3ef21ffd2a
Publikováno v:
SCOPES
Proceedings of the 17th International Workshop on Software and Compilers for Embedded Systems (SCOPES 2014), 11-20
STARTPAGE=11;ENDPAGE=20;TITLE=Proceedings of the 17th International Workshop on Software and Compilers for Embedded Systems (SCOPES 2014)
Proceedings of the 17th International Workshop on Software and Compilers for Embedded Systems (SCOPES 2014), 11-20
STARTPAGE=11;ENDPAGE=20;TITLE=Proceedings of the 17th International Workshop on Software and Compilers for Embedded Systems (SCOPES 2014)
Exact analysis of synchronous dataflow (sdf) graphs is often considered too costly, because of the expensive transformation of the graph into a single-rate equivalent. As an alternative, several authors have proposed approximate analyses. Existing ap
Publikováno v:
ACSD
Proceedings of the 14th International Conference on Application of Concurrency to System Design, ACSD 2014, 62-71
STARTPAGE=62;ENDPAGE=71;TITLE=Proceedings of the 14th International Conference on Application of Concurrency to System Design, ACSD 2014
Proceedings of the 14th International Conference on Application of Concurrency to System Design, ACSD 2014, 62-71
STARTPAGE=62;ENDPAGE=71;TITLE=Proceedings of the 14th International Conference on Application of Concurrency to System Design, ACSD 2014
In this paper, we present a transformation that takes a cyclo-static dataflow (CSDF) graph and produces an equivalent multi-rate synchronous dataflow (MRSDF) graph. This fills a gap in existing analysis techniques for synchronous dataflow graphs, tra
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::c300a90d6bab30d6edb7b4fdd9756f09
https://doi.org/10.1109/acsd.2014.24
https://doi.org/10.1109/acsd.2014.24
Publikováno v:
Proceedings of the 14th International Conference on Application of Concurrency to System Design (ACSD 2014), 72-81
STARTPAGE=72;ENDPAGE=81;TITLE=Proceedings of the 14th International Conference on Application of Concurrency to System Design (ACSD 2014)
ACSD
University of Twente Research Information (Pure Portal)
STARTPAGE=72;ENDPAGE=81;TITLE=Proceedings of the 14th International Conference on Application of Concurrency to System Design (ACSD 2014)
ACSD
University of Twente Research Information (Pure Portal)
Synchronous dataflow (SDF) graphs are a widely used formalism for modelling, analysing and realising streaming applications, both on a single processor and in a multiprocessing context. Efficient schedules are essential to obtain maximal throughput u
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::f305c28a1fb1e34e960ffdac4ab083df
https://research.utwente.nl/en/publications/aa281c6a-b5a4-41b3-b42c-fa54684cf397
https://research.utwente.nl/en/publications/aa281c6a-b5a4-41b3-b42c-fa54684cf397
Autor:
Jan Kuper, Marco E. T. Gerards, Gerard J. M. Smit, Philip K. F. Hölzenspies, Johann L. Hurink
Publikováno v:
22nd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, PDP 2014, 512-519
STARTPAGE=512;ENDPAGE=519;TITLE=22nd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, PDP 2014
PDP
STARTPAGE=512;ENDPAGE=519;TITLE=22nd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, PDP 2014
PDP
Computers can reduce their power consumption by decreasing their speed using Dynamic Voltage and Frequency Scaling (DVFS). A form of DVFS for multicore processors is global DVFS, where the voltage and clock frequency is shared among all processor cor
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::2637e6009517ab017ec66b7279fca2ee
https://research.utwente.nl/en/publications/88ad3dd9-6dd3-489a-94d7-daca1e9244be
https://research.utwente.nl/en/publications/88ad3dd9-6dd3-489a-94d7-daca1e9244be
Publikováno v:
Implementation and Application of Functional Languages ISBN: 9783642242755
IFL
IFL
Processor designs specialized for functional languages received very little attention in the past 20 years. The potential for exploiting more parallelism and the developments in hardware technology, ask for renewed investigation of this topic. In thi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4ed93106a22ea9e96bc2bfe45d8ea922
https://doi.org/10.1007/978-3-642-24276-2_4
https://doi.org/10.1007/978-3-642-24276-2_4
Publikováno v:
Proceedings of the 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2010, 699-705
STARTPAGE=699;ENDPAGE=705;TITLE=Proceedings of the 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2010
DSD
STARTPAGE=699;ENDPAGE=705;TITLE=Proceedings of the 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2010
DSD
This paper presents an approximate Maximum Common Sub graph (MCS) algorithm, specifically for directed, cyclic graphs representing digital circuits. Because of the application domain, the graphs have nice properties: they are very sparse, have many d
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a05047861f9d048b57d6f99ad4a35e0c
https://doi.org/10.1109/dsd.2010.29
https://doi.org/10.1109/dsd.2010.29
Autor:
Philip K. F. Hölzenspies
The `free' speed-up stemming from ever increasing processor speed is over. Performance increase in computer systems can now only be achieved through parallelism. One of the biggest challenges in computer science is how to map applications onto parall
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::8da100867d9005355e5b8373d9b446ca
https://research.utwente.nl/en/publications/on-runtime-exploitation-of-concurrency(0a56b39a-a5c4-4b1a-9f4d-d36492262768).html
https://research.utwente.nl/en/publications/on-runtime-exploitation-of-concurrency(0a56b39a-a5c4-4b1a-9f4d-d36492262768).html