Zobrazeno 1 - 3
of 3
pro vyhledávání: '"Philip Ferolito"'
Autor:
Ronald Melanson, A. Charnas, Matthew R. Allen, B.A. Frederick, Sundari S. Mitra, V. Ganesan, I. Razzack, R.K. Yu, Marc Tremblay, V. Reddy, W.J. de Lange, S. Nguyen, D.L. Wendell, David J. Greenhill, J.M. Kaku, C.R. Srivatsa, S.I. Shah, Marc E. Levitt, K. Shin, L. Lev, Duy Dinh Pham, R.I. Bartolotti, E. Anderson, H.I. Hingarh, Philip Ferolito, A. Dalal
Publikováno v:
IEEE Journal of Solid-State Circuits. 30:1227-1238
A 167 MHz 64 b VLSI CPU chip is described. The chip executes a 333-MFLOPS (peak) with an estimated system performance of 270SPECint92/380SPECfp92 (@167 MHz, 2 MB E-cache). The 17.7/spl times/17.8 mm die is fabricated with a 0.5 micron CMOS technology
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::db9f771704f9190e55a8925447b80fb9
https://doi.org/10.1109/4.475710
https://doi.org/10.1109/4.475710
Autor:
S. Gopaladhine, K. Ho, K. Shin, Ronald Melanson, Jennifer Bauman, Wenjay Hsu, E. Anderson, S.I. Shah, R. Weisenbach, A. Charnas, David J. Greenhill, R. Salem, P. Kongetira, Manjunath Doreswamy, R. Cheerla, V. Reddy, Hao Chen, H. Sathianathan, C.R. Srivatsa, Philip Ferolito
Publikováno v:
1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers.
This is a second-generation, highly-integrated superscalar processor implementing the Sparc V9 64b architecture. Performance is improved by increasing clock frequency and by improvements in the memory system. Clock rates up to 330 MHz are achieved. M
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5146474dccf66e29e4fc62485231c387
https://doi.org/10.1109/isscc.1997.585318
https://doi.org/10.1109/isscc.1997.585318
Autor:
Marc Tremblay, P. Fu, D. Chen, N. Parveen, M. Wong, P. Patel, A. Prabhu, K. Normoyle, D. Chang, G. Maturana, R. Eltejaein, K. Holdbrook, L. Kohn, Marc E. Levitt, Jennifer Bauman, H. Grewal, D. Mrazek, R. Garner, R.K. Yu, D. Greenley, H. Kwan, B. Kim, D. Greenhill, Liuxi Yang, G. Zyner, Philip Ferolito, C. Narasimhaiah, K. Yarlagadda, R. Yung
Publikováno v:
COMPCON
UltraSPARC is the first microprocessor from Sun Microsystems' SPARC Technology Business to implement the new 64-bit SPARC V9 architecture. ULtraSPARC is equipped with unique multimedia capabilities and is capable of 4-way superscalar instruction disp
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cda208b5d4e7b6ebdfd4ba4531f1b30f
https://doi.org/10.1109/cmpcon.1995.512421
https://doi.org/10.1109/cmpcon.1995.512421