Výsledky vyhledávání - "Phil-Jung Kim"

Doppler effect on V2I path loss and V2V channel models

Autor: Phil-jung Kim, Jung-Hyun Yoon, Sun-Kuk Noh

Publikováno v: ICTC

Characterizing the channel for vehicle-to-vehicle (V2V) and vehicle-to-infrastructure (V2I) communications in the 5 GHz frequency band is of great interest within the increasingly growing field of intelligent transportation systems. In this study, we

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::13f3a1f886578469661f88da032335d1
https://doi.org/10.1109/ictc.2016.7763324

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A Design on the Digital Audio Synthesis Filter by DALUT

Autor: Phil-Jung Kim, Dae-Sung Ku, Jong-Bin Kim, Jung-Hyun Yun

Publikováno v: Lecture Notes in Computer Science ISBN: 9783540459071
ICNC (2)

Semiconductor Technology and multimedia communication has been developed to interest in high quality video and multi channels audio. Especially, it is trend to important technology so that DVD market grows rapidly. Mpeg audio standard is available su

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::8de7e1d9b541c20e1d778dee3e0458be
https://doi.org/10.1007/11881223_110

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An effective routing methodology in the era of 0.2 μm and beyond technologies for reducing the DRAM design cost

Autor: Jae-Kyung Wee, Jae-Young Cha, Jae-Seok Park, Cheol-Soo Choi, Kyoung-Soo Lee, Jin-Keun Oh, Ho-Youb Cho, Phil-Jung Kim, Joo-Sun Choi, Jong Woo Kim, Jae-Ik Doh, Hong-Bae Yoon, Changhyuk Lee

Publikováno v: AP-ASIC'99. First IEEE Asia Pacific Conference on ASICs (Cat. No.99EX360).

The optimum routing methodology for high-performance and fast-layout time DRAM design in the era beyond 0.2 /spl mu/m technology is investigated. The key attributes of the methodology are that it does pitch-based interconnect design (/spl lambda/-rul

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::7b3290594b45d816ed8e71e12309a9e3
https://doi.org/10.1109/apasic.1999.824116

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Antifuse EPROM circuit for field programmable DRAM

Autor: null Joo-Sun Choi, null Jae-Kyung Wee, null Ho-Youb Cho, null Phil-Jung Kim, null Jin-Keun Oh, null Chang-Hyuk Lee, null Jin-Yong Chung, null Sea-Chung Kim, null Woodward Yang

Publikováno v: 2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056).

A 3 V EPROM circuit is implemented in an existing 0.22 /spl mu/m DRAM process with an antifuse based on destructive breakdown of the highly-reliable 6.5 nm oxide-nitride-oxide (ONO) storage capacitor dielectric. Using an internal high-voltage charge

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::90f5ff47748ced8eb3a8b893e8ede54b
https://doi.org/10.1109/isscc.2000.839836

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