Zobrazeno 1 - 10
of 27
pro vyhledávání: '"Peter Sarson"'
Autor:
Constantinos Xanthopoulos, Arnold Neckermann, Klaus-Peter Tschernay, Peter Sarson, Yiorgos Makris, Paulus List
Publikováno v:
IEEE Transactions on Device and Materials Reliability. 20:295-307
Ensuring high reliability in modern integrated circuits (ICs) requires the employment of several die screening methodologies. One such technique, commonly referred to as die inking, aims to discard devices that are likely to fail, based on their prox
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f90e6d8998aaf0adb85fcaa31652f535
https://doi.org/10.1109/tdmr.2020.2994291
https://doi.org/10.1109/tdmr.2020.2994291
Publikováno v:
Journal of Electronic Testing. 34:233-253
This paper discusses the implementation possibilities for making Group Delay measurements of RF frequency converting devices using a standard RF semiconductor Automatic Test Equipment (ATE) that cannot be done using the standard S-parameter measureme
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::be91940c37d5f1c5cc06546fc939bf38
https://doi.org/10.1007/s10836-018-5708-y
https://doi.org/10.1007/s10836-018-5708-y
Publikováno v:
Journal of Electronic Testing. 34:215-232
This paper demonstrates a phase switching algorithm for Interpolating Digital-to-Analog Converter (DAC) based Arbitrary Waveform Generator (AWG) that resides in Automated Test Equipment (ATE) to test semiconductor devices. This confirms a previous ex
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1ef771775d9b5b01a3aa3bd224b5162a
https://doi.org/10.1007/s10836-017-5700-y
https://doi.org/10.1007/s10836-017-5700-y
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25:1250-1260
This paper presents the optimization of an existing electrically eraseable programmable read-only memory (EEPROM) production test flow by means of thorough analysis of the faulty dice and the test flow, which leads to an increase in the yield, a sign
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::16fd43b79b386188a120f9df87b3e862
https://doi.org/10.1109/tvlsi.2016.2634589
https://doi.org/10.1109/tvlsi.2016.2634589
Autor:
Yiorgos Makris, Arnold Neckermann, Paulus List, Klaus-Peter Tschernay, Peter Sarson, Constantinos Xanthopoulos
Publikováno v:
IOLTS
Ensuring high reliability in modern integrated circuits (ICs) requires the employment of several die screening methodologies. One such technique, commonly referred to as die inking, aims to discard devices that are likely to fail, based on their prox
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8e69f0435602c61cdb5bc260a37c85e9
https://doi.org/10.1109/iolts.2019.8854373
https://doi.org/10.1109/iolts.2019.8854373
Publikováno v:
VTS
In this IP session, there will be 2 presentations focusing on how to increase the in-field quality level of A/MS devices. The 1st presentation will discuss how to increase the observed return rates of Automotive ICs to 10ppb but at the same time as r
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::778055c8025e07fb082697fe89985088
https://doi.org/10.1109/vts.2019.8758632
https://doi.org/10.1109/vts.2019.8758632
Autor:
Peter Sarson
Publikováno v:
Journal of Electronic Testing. 33:283-294
This paper describes how to measure a full suite of RF filter characteristics using reusable code to produce a chirp that sweeps the filters' frequency range. It shows how to measure 3 dB points, bandwidth and group delay of any filter and how accura
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::df4b36b164e92b6f9ef694bff1266c0f
https://doi.org/10.1007/s10836-016-5633-x
https://doi.org/10.1007/s10836-016-5633-x
Autor:
Haruo Kobayashi, Peter Sarson
Publikováno v:
Journal of Electronic Testing. 33:295-303
In this paper, we describe how a phase switching technique is used to control the harmonic contents of a generated sinusoidal signal using digital signal processing techniques. We will describe how this technique equalizes the harmonic performance of
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::6c34996720ccd999b027bea3f61198cf
https://doi.org/10.1007/s10836-016-5630-0
https://doi.org/10.1007/s10836-016-5630-0
Publikováno v:
VTS
Modern high reliability EEPROM technologies use advanced screening methods to screen out weak bit cells. In combination with standard ECC (Error Correction Code) methods EEPROMs can be produced to withstand more than 50k endurance cycles at 150°C an
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::78237ee1d18f6143ee16be6d2d24b36a
https://doi.org/10.1109/vts.2018.8368631
https://doi.org/10.1109/vts.2018.8368631