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pro vyhledávání: '"Peter J. Osler"'
Autor:
Peter J. Osler, John M. Cohn
Publikováno v:
EDA for IC Implementation, Circuit Design, and Process Technology ISBN: 9781315221694
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0548f8c2efe8bd690e5d1e663234f013
https://doi.org/10.1201/9781420007954-10
https://doi.org/10.1201/9781420007954-10
Autor:
H. H. Chao, Peter J. Osler, Leon Stok, Nathaniel D. Hieter, Andrew Sullivan, Daniel Brand, Lakshmi Reddy, D. J. Geiger, David S. Kung, A. D. Drumm
Publikováno v:
IBM Journal of Research and Development. 40:407-430
Logic synthesis is the process of automatically generating optimized logic-level representation from a high-level description. With the rapid advances in integrated circuit technology and the resultant growth in design complexity, designers increasin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::738efb2f163c1402906a4b9032036cc4
https://doi.org/10.1147/rd.404.0407
https://doi.org/10.1147/rd.404.0407
Autor:
Peter J. Osler
Publikováno v:
ISPD
In this paper I describe two sets of two large ASIC chips that have recently been processed from netlist to final design by the Semi-Custom Design Team part of IBM's World-Wide Design Center. I address issues such as why the parts were selected for s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cdff3822548d9dd29c4f68a1e1949419
https://doi.org/10.1145/981066.981107
https://doi.org/10.1145/981066.981107
Autor:
Stephen Douglas Posluszny, Frank J. Musante, Michael A. Kazda, Joshua Friedrich, Lakshmi Reddy, Vasant Rao, Douglass T. Lamb, Jeremy T. Hopkins, Gustavo E. Tellez, Cliff Sze, Markus J. Buehler, Uwe Brandt, Benjamin R. Russell, Thomas Edward Rosser, Zahi M. Kurzum, Jack DiLullo, Jens Noack, Ruchir Puri, Haifeng Qian, Peter J. Osler, Alice Lee, Joachim Keinert, Shyam Ramji, Haoxing Ren, Mozammel Hossain
Publikováno v:
IBM Journal of Research and Development. 55:9:1-9:14
The IBM POWER7® microprocessor, which is the next-generation IBM POWER® processor, leverages IBM's 45-nm silicon-on-insulator (SOI) process with embedded dynamic random access memory to achieve industry-leading performance. To deliver this complex
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1db78a9d665e493366d1cce9d5d51b3b
https://doi.org/10.1147/jrd.2011.2105692
https://doi.org/10.1147/jrd.2011.2105692
Conference
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