Zobrazeno 1 - 10
of 15
pro vyhledávání: '"Peter H. Hochschild"'
Publikováno v:
Computers & Graphics. 27:669-680
We present a scalable, commodity-based, parallel rendering system for interactive visualization of large polygonal and volumetric data models. Our system utilizes commodity PCs that have multiple CPUs and high-capacity I/O buses, a fast AGP bus, and
Autor:
José E. Moreira, Susan Flynn Hummel, Marc Snir, T.J.C. Ward, R. Shah, Wanda Andreoni, A. A. Bright, T. Picunko, Monty M. Denneau, H. Ho, Suryabhan Singh, Jose R. Brunheroto, M. Newton, Alessandro Curioni, Paul W. Coteus, Calin Cascaval, Jed W. Pitera, Rick A. Rand, Manish Gupta, Valentina Salapura, D. Beece, T. Jonas, Maria Eleftheriou, George Almási, Robert S. Germain, Peter H. Hochschild, Derek Lieber, Bruce M. Fleischer, Henry S. Warren, Ruhong Zhou, Donna L. Gresh, K. Maturu, D.M. Newns, Mark E. Giampapa, Blake G. Fitch, Wilm E. Donath, Robert Alan Philhower, Bruce J. Berne, Frank Suits, William C. Swope, N. Vishnumurthy, Glenn J. Martyna, A. Sanomiya, José G. Castaños, Yuk Y. Sham, Christos John Georgiou, Michael C. Pitman, Paul G. Crumley, Ajay K. Royyuru, Richard A. Swetz, F. E. Allen, R. A. Haring
Publikováno v:
IBM Systems Journal. 40:310-327
In December 1999, IBM announced the start of a five-year effort to build a massively parallel computer, to be applied to the study of biomolecular phenomena such as protein folding. The project has two main goals: to advance our understanding of the
Publikováno v:
IBM Systems Journal. 34:205-221
This paper describes the software available on the IBM SP2™ for parallel program development and execution. It presents the rationale for the design of the Message-Passing Library used on the SP2, outlines its current implementation, and gives info
Autor:
R. F. Stucke, B. J. Nathanson, B. Aball, M. G. Atkins, Donald G. Grice, M. Tsao, Richard A. Swetz, Douglas J. Joseph, Peter H. Hochschild, Dennis G. Shea, Craig B. Stunkel, Carl A. Bender, P. R. Varker
Publikováno v:
IBM Systems Journal. 34:185-204
The heart of an IBM SP2™ system is the HighPerformance Switch, which is a low-latency, highbandwidth switching network that binds together RISC System/6000® processors. The switch incorporates a unique combination of topology and architectural fea
Autor:
Peter H. Hochschild, Rama K. Govindaraju, Piyush Chaudhary, Rajeev Sivaram, Robert S. Blackmore
Publikováno v:
Hot Interconnects
The architecture, design and performance of RDMA (remote direct memory access) over the IBM HPS (high performance switch and adapter) are described. Unlike conventional implementations such as InfiniBand, our RDMA transport model is layered on top of
Autor:
Jason E. Goscinski, Kevin J. Gildea, Don Grice, Piyush Chaudhary, Jay R. Herring, Carl A. Bender, Rama K. Govindaraju, Peter H. Hochschild, Chulho Kim, Steven J. Martin, John Houston, Robert S. Blackmore
Publikováno v:
Lecture Notes in Computer Science ISBN: 9783540241294
HiPC
HiPC
In this paper we describe the architecture, design, and performance of the new cluster switch fabric and adapter called HPS (High Performance Switch) HPS delivers very low latency and very high bandwidth We demonstrate latency of less than 4.3us MPI
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9d7ac19d8627c1a91f8260104ac65ebf
https://doi.org/10.1007/978-3-540-30474-6_21
https://doi.org/10.1007/978-3-540-30474-6_21
Publikováno v:
Proceedings of IEEE Scalable High Performance Computing Conference.
The IBM scalable POWERparallel systems 9076 SP1 connects RISC System/6000 processors via a communication network called the high-performance switch. This switch-based upon the Vulcan parallel processor incorporates a number of unusual features to enh
Autor:
M. Tsao, B. J. Nathanson, Douglas J. Joseph, Bulent Abali, Peter H. Hochschild, Craig B. Stunkel, Monty M. Denneau, P. R. Varker, Dennis G. Shea
Publikováno v:
IPPS
IBM's recently announced Scalable POWERparallel family of systems is based upon the Vulcan architecture, and the currently available 9076 SP1 parallel system utilizes fundamental Vulcan technology. The experimental Vulcan parallel processor is design
Publikováno v:
Visualization and Data Analysis
A framework for parallel visualization at Pacific Northwest National Laboratory (PNNL) is being developed that utilizes the IBM Scaleable Graphics Engine (SGE) and IBM SP parallel computers. Parallel visualization resources are discussed, including d
Publikováno v:
ICPP (3)
This article introduces MPI-F an efficient implementation of MPI on the IBM-SP1 distributed memory cluster. After discussing the novel and key concepts of MPI and how they relate to an implementation, the MPI-F system architecture is outlined in deta