Zobrazeno 1 - 10
of 35
pro vyhledávání: '"Peter B. Denyer"'
Autor:
Stewart G. Smith, Peter B. Denyer
This book is concerned with advances in serial-data computa tional architectures, and the CAD tools for their implementation in silicon. The bit-serial tradition at Edinburgh University (EU) stretches back some 6 years to the conception of the FIRS
Autor:
A. A. Murray, Robert Henderson, Scot D. Anderson, Andrew J. Holmes, Stewart Smith, David Renshaw, M. J. Torrie, P. Likoudis, M.J. Panaghiston, D.J. Baxtr, Peter B. Denyer, J.E.D. Hurwitz
Publikováno v:
IEEE Journal of Solid-State Circuits. 33:2104-2111
We report a single-chip CMOS NTSC video camera, incorporating a 306/spl times/244 image sensor array, sensor readout logic, A/D and D/A converters, and a custom 300-MIPS processor for color reconstruction and NTSC encoding. Operation is from a single
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::53e90ddd3c93505ffc66e7de7767994f
https://doi.org/10.1109/4.735553
https://doi.org/10.1109/4.735553
Publikováno v:
ICCAD
An approach is described for addressing generation hardware synthesis. The authors present algorithms and tools that describe the hardware between a binary counter and the address port of a block of memory, which is accessed in some repetitive patter
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dff767e3cd987eb554e97d226ce1c8fd
https://doi.org/10.1109/iccad.1989.76917
https://doi.org/10.1109/iccad.1989.76917
Publikováno v:
Proceedings of the IEEE 1991 Custom Integrated Circuits Conference.
The authors describe a real-time image processing system, including an image sensing array, which is implemented as a single VLSI device. An architectural overview and system performance figures demonstrate that, through efficient integration of the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5819611d3d95ba890161e53ddaa173ce
https://doi.org/10.1109/cicc.1991.164003
https://doi.org/10.1109/cicc.1991.164003
Publikováno v:
Solid State Sensor Arrays: Development and Applications.
An 800k-pixel active pixel device has been developed for use in a digital still camera application. A mode of operation has been developed to cancel the problems of fixed patterned noise and dark current inherent to this type of CMOS imaging array. A
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::997ea724aa2558d2aa5e6d6186314aee
https://doi.org/10.1117/12.275168
https://doi.org/10.1117/12.275168
Publikováno v:
SPIE Proceedings.
We report on the integration of computational and control functions with image sensor arrays using commodity CMOS processes. The sensors are highly efficient, high density arrays of photo-diodes, with a minimal overhead of one transistor per pixel. W
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7fca4581be50c6cc0c46ecdb3c59d88b
https://doi.org/10.1117/12.206525
https://doi.org/10.1117/12.206525
Publikováno v:
SPIE Proceedings.
Over the years a considerable amount of research has been conducted in the area of passive stereo vision. Usually attempts have been made to solve the stereo correspondence problem in its most general sense and build an all purpose stereo module. Pos
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2de44f723839514861cedeac8f5d7fd4
https://doi.org/10.1117/12.130883
https://doi.org/10.1117/12.130883
Publikováno v:
BMVC92 ISBN: 9783540197775
BMVC
BMVC
Automatic facial recognition is an attractive solution to the problem of computerised personal identification. In order to facilitate a cost effective solution, high levels of data reduction are required when storing the facial information. Vector Qu
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::368475efabd97c01dfde98b9bcef9382
https://doi.org/10.5244/c.6.53
https://doi.org/10.5244/c.6.53
Publikováno v:
IEE Proceedings E Computers and Digital Techniques. 137:65
A traffic routing algorithm is presented for system customisation of the serial superchip architecture [1, 2]. In modern signal processing and scientific computation, system reconfigurability is highly desired to achieve dynamic reconfiguration durin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::82f8307d967469feced5d25dd83061b3
https://doi.org/10.1049/ip-e.1990.0006
https://doi.org/10.1049/ip-e.1990.0006
Publikováno v:
IEEE Journal of Solid-State Circuits. 23:639-646
A superchip for realizing ultra-large-scale integrated (ULSI) systems based on a wafer-scale integrated (WSI) circuit concept, which incorporates defect/fault tolerance and system reconfiguration, is introduced. The key features of the central archit
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8d8e330b6df387d86ee22a00525cde89
https://doi.org/10.1109/4.301
https://doi.org/10.1109/4.301